M27C801-100B STMicroelectronics, M27C801-100B Datasheet - Page 9

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M27C801-100B

Manufacturer Part Number
M27C801-100B
Description
8 Mbit 1Mb x 8 UV EPROM and OTP EPROM
Manufacturer
STMicroelectronics
Datasheet

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Figure 7. Programming and Verify Modes AC Waveforms
Figure 8. Programming Flowchart
YES
NO
= 25
FAIL
++n
A0-A19
Q0-Q7
V CC
GV PP
E
V CC = 6.25V, V PP = 12.75V
RESET MARGIN MODE
SET MARGIN MODE
CHECK ALL BYTES
NO
2nd: V CC = 4.2V
E = 50 s Pulse
1st: V CC = 6V
VERIFY
n = 0
Addr
Last
YES
YES
NO
tVCHEL
tVPHEL
tQVEL
tAVEL
++ Addr
DATA IN
AI01271B
PROGRAM
VALID
tELEH
tEHQX
PRESTO IIB Programming Algorithm
PRESTO IIB Programming Algorithm allows the
whole array to be programmed with a guaranteed
margin, in a typical time of 52.5 seconds. This can
be achieved with STMicroelectronics M27C801
due to several design innovations to improve pro-
gramming efficiency and to provide adequate mar-
gin for reliability. Before starting the programming
the internal MARGIN MODE circuit is set in order
to guarantee that each cell is programmed with
enough margin. Then a sequence of 50 s pro-
gram pulses are applied to each byte until a cor-
rect verify occurs. No overprogram pulses are
applied since the verify in MARGIN MODE pro-
vides the necessary margin.
Program Inhibit
Programming of multiple M27C801s in parallel
with different data is also easily accomplished. Ex-
cept for E, all like inputs including GV
allel M27C801 may be common. A TTL low level
pulse applied to a M27C801’s E input, with V
12.75V, will program that M27C801. A high level E
input inhibits the other M27C801s from being pro-
grammed.
Program Verify
A verify (read) should be performed on the pro-
grammed bits to determine that they were correct-
ly programmed. The verify is accomplished with G
at V
falling edge of E.
tEHVPX
IL
. Data should be verified with t
tVPLEL
VERIFY
tELQV
DATA OUT
tEHAX
tEHQZ
AI01270
ELQV
PP
M27C801
of the par-
after the
PP
9/16
at

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