X28C512 Xicor, X28C512 Datasheet

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X28C512

Manufacturer Part Number
X28C512
Description
5 Volt/ Byte Alterable E2PROM
Manufacturer
Xicor
Datasheet

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© Xicor, Inc. 1991, 1995, 1996 Patents Pending
3856-3.2 8/5/97 T1/C0/D0 EW
X28C512/X28C513
512K
FEATURES
PIN CONFIGURATIONS
V SS
I/O 0
I/O 1
I/O 2
A 15
A 12
NC
NC
A 7
A 6
A 5
A 4
A 3
A 2
A 1
A 0
Access Time: 90ns
Simple Byte and Page Write
—Single 5V Supply
—Self-Timed
Low Power CMOS:
—Active: 50mA
—Standby: 500 A
Software Data Protection
—Protects Data Against System Level
High Speed Page Write Capability
Highly Reliable Direct Write™ Cell
—Endurance: 100,000 Write Cycles
—Data Retention: 100 Years
Early End of Write Detection
—DATA Polling
—Toggle Bit Polling
— No External High Voltages or V
—No Erase Before Write
—No Complex Programming Algorithms
—No Overerase Problem
Inadvertant Writes
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
PLASTIC DIP
FLAT PACK
Circuits
SOIC (R)
CERDIP
X28C512
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
3856 FHD F01
V CC
WE
NC
A 14
A 13
A 8
A 9
A 11
OE
A 10
CE
I/O 7
I/O 6
I/O 5
I/0 4
I/O 3
V CC
A 11
A 13
A 14
A 15
A 12
WE
NC
NC
NC
NC
NC
NC
NC
5 Volt, Byte Alterable E
A 9
A 8
A 7
A 6
A 5
A 4
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
X28C512/X28C513
PP
13
12
10
Control
8
6
A 1
A 2
A 4
A 6
A 12
15
14
11
9
7
5
4
I/O 0
A 0
A 3
A 5
A 7
A 15
NC
17
16
2
3
I/O 2
I/O 1
NC
NC
TSOP
X28C512
BOTTOM
PGA
VIEW
19
18
36
1
I/O 3
V SS
V CC
NC
1
21
20
34
35
I/O 5
I/O 4
NC
WE
DESCRIPTION
The X28C512/513 is an 64K x 8 E
with Xicor’s proprietary, high performance, floating gate
CMOS technology. Like all Xicor programmable non-
volatile memories the X28C512/513 is a 5V only device.
The X28C512/513 features the JEDEC approved pinout
for bytewide memories, compatible with industry stan-
dard EPROMS.
The X28C512/513 supports a 128-byte page write op-
eration, effectively providing a 39 s/byte write cycle and
enabling the entire memory to be written in less than 2.5
seconds. The X28C512/513 also features DATA Polling
and Toggle Bit Polling, system software support schemes
used to indicate the early completion of a write cycle. In
addition, the X28C512/513 supports the Software Data
Protection option.
Two PLCC and LCC Pinouts
—X28C512
—X28C513
22
23
25
27
29
32
33
I/O 6
I/O 7
A 10
A 11
A 8
NC
NC
—X28C010 E
—Compatible with Lower Density E
24
26
28
30
31
CE
OE
A 9
A 13
A 14
2
3856 ILL F22
PROM
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
3856 FHD F02
OE
A 10
CE
I/O 7
I/O 6
I/O 5
I/O 4
I/O 3
NC
NC
V SS
NC
NC
I/O 2
I/O 1
I/O 0
A 0
A 1
A 2
A 3
2
PROM Pin Compatible
Characteristics subject to change without notice
I/O 0
I/O 0
NC
A 7
A 6
A 5
A 4
A 3
A 2
A 1
A 0
A 6
A 5
A 4
A 3
A 2
A 1
A 0
14
14
10
11
12
13
10
11
12
13
5 4 3
7
5 4 3
6
7
8
9
6
8
9
15
15
PLCC / LCC
2
(TOP VIEW)
(TOP VIEW)
PROM, fabricated
X28C512
X28C513
16
16
2
2
64K x 8 Bit
17
17
1
1
32
18 19 20
32
18 19 20
2
31
31
PROMs
29
28
27
26
25
24
23
22
29
28
27
26
25
24
23
22
30
30
21
21
3856 FHD F03
3856 FHD F04
A 14
A 13
A 8
A 9
A 11
OE
A 10
CE
I/O 7
A 8
A 9
A 11
NC
OE
A 10
CE
I/O 7
I/O 6

Related parts for X28C512

X28C512 Summary of contents

Page 1

... The X28C512/513 is an 64K with Xicor’s proprietary, high performance, floating gate CMOS technology. Like all Xicor programmable non- volatile memories the X28C512/513 only device. The X28C512/513 features the JEDEC approved pinout for bytewide memories, compatible with industry stan- dard EPROMS ...

Page 2

... The Output Enable input controls the data output buffers and is used to initiate read operations. Data In/Data Out (I/O –I Data is written to or read from the X28C512/513 through the I/O pins. Write Enable (WE) The Write Enable input controls the writing of data to the X28C512/513. FUNCTIONAL DIAGRAM A 7 – – ...

Page 3

... The X28C512/513 features DATA Polling as a method to indicate to the host system that the byte write or page write cycle has completed. DATA Polling allows a simple bit test operation to determine the status of the X28C512/ 513, eliminating additional interrupt inputs or external hardware. During the internal programming cycle, any ...

Page 4

... READY HIGH DATA Polling can effectively halve the time for writing to the X28C512/513. The timing diagram in Figure 2a illustrates the sequence of events on the bus. The software flow diagram in Figure 2b illustrates one method of implementing the routine. 3856 FHD F08 ...

Page 5

... DATA Polling. This can be especially helpful in an array comprised of multiple X28C512/513 memories that is frequently up- dated. Toggle Bit Polling can also provide a method for status checking in multiprocessor applications. The timing diagram in Figure 3a illustrates the sequence of events on the bus ...

Page 6

... This circuit is nonvolatile and will remain set for the life of the device unless the reset command is issued. Once the software protection is enabled, the X28C512/ 513 is also protected from inadvertent and accidental writes in the powered-up state. That is, the software algorithm must be issued prior to writing additional data to the device ...

Page 7

... X28C512/513 will automatically disable further writes unless another command is issued to cancel it further commands are issued the X28C512/513 will be write protected during power-down and after any subse- quent power-up. The state of A algorithm is don’t care. ...

Page 8

... E PROM programmer, the following six step algo- rithm will reset the internal protection circuit. After t the X28C512/513 will be in standard operating mode. Note: Once initiated, the sequence of write operations should not be interrupted. 3856 FHD F14 8 ...

Page 9

... X28C512/X28C513 SYSTEM CONSIDERATIONS Because the X28C512/513 is frequently used in large memory arrays it is provided with a two line control architecture for both read and write operations. Proper usage can provide the lowest possible power dissipation and eliminate the possibility of contention where mul- tiple I/O pins share the same bus. ...

Page 10

... X28C512/X28C513 ABSOLUTE MAXIMUM RATINGS* Temperature under Bias X28C512/513 ............................... – +85 C X28C512I/513I ........................... – +135 C X28C512M/513M ....................... – +135 C Storage Temperature ....................... – +150 C Voltage on any Pin with Respect ....................................... D.C. Output Current ............................................. 5mA Lead Temperature (Soldering, 10 seconds) .............................. 300 C RECOMMEND OPERATING CONDITIONS Temperature Min ...

Page 11

... X28C512/X28C513 POWER-UP TIMING Symbol PUR (2) t Power-up to Read Operation t PUW (2) Power-up to Write Operation CAPACITANCE 1MHz Symbol I/O (2) C Input/Output Capacitance (2) C Input Capacitance IN ENDURANCE AND DATA RETENTION Parameter Endurance Endurance Data Retention A.C. CONDITIONS OF TEST Input Pulse Levels Input Rise and ...

Page 12

... return HIGH (whichever occurs first) to the time when the outputs are no longer driven X28C512-90 X28C512-12 X28C512-15 X28C512-20 X28C512-25 X28C513-90 X28C513-12 X28C513-15 X28C513-20 X28C513-25 Min. Max. Min. Max. Min. Max. Min. Max. Min. Max. Units ...

Page 13

... X28C512/X28C513 WRITE CYCLE LIMITS Symbol Parameter (4) t Write Cycle Time WC t Address Setup Time AS t Address Hold Time AH t Write Setup Time CS t Write Hold Time CH CE Pulse Width HIGH Setup Time t OES OE HIGH Hold Time t OEH WE Pulse Width t WP ...

Page 14

... X28C512/X28C513 CE Controlled Write Cycle ADDRESS OES DATA IN DATA OUT Page Write Cycle OE ( *ADDRESS (6) I/O BYTE 0 *For each successive write within the page write operation –A 15 should be the same or writes to an unknown address could occur. ...

Page 15

... X28C512/X28C513 DATA Polling Timing Diagram ( ADDRESS I/O 7 Toggle Bit Timing Diagram OEH OE HIGH Z I Starting and ending state of I/O 6 will vary, depending upon actual Note: (7) Polling operations are by definition read cycles and are therefore subject to read cycle timings. ...

Page 16

... X28C512/X28C513 NOTES 16 ...

Page 17

... X28C512/X28C513 PACKAGING INFORMATION 32-LEAD HERMETIC DUAL IN-LINE P ACKAGE TYPE D PIN 1 SEATING PLANE 0.150 (3.81) MIN. 0.200 (5.08) 0.125 (3.18) NOTE: ALL DIMENSIONS IN INCHES (IN P ARENTHESES IN MILLIMETERS) 1.690 (42.95) MAX. 0.065 (1.65) 0.033 (0.84) 0.110 (2.79) TYP. 0.055 (1.40) 0.090 (2.29) TYP. 0.018 (0.46) 0.620 (15.75) 0.590 (14.99) TYP. 0.614 (15.60) 0.015 (0.38) 0.008 (0.20) 17 0.610 (15.49) 0.500 (12.70) ...

Page 18

... X28C512/X28C513 PACKAGING INFORMATION 32-PAD CERAMIC LEADLESS CHIP CARRIER PACKAGE TYPE E 0.015 (0.38) 0.003 (0.08) PIN 1 0.200 (5.08) BSC 0.028 (0.71) 0.022 (0.56) (32) PLCS. 0.300 (7.62) BSC 0.150 (3.81) BSC 0.020 (0.51 REF. 0.095 (2.41) 0.075 (1.91) 0.022 (0.56) DIA. 0.006 (0.15) 0.055 (1.39) 0.045 (1.14) TYP. (4) PLCS. 0.015 (0.38) MIN. 0.040 (1.02 REF. TYP. (3) PLCS. ...

Page 19

... X28C512/X28C513 PACKAGING INFORMATION 32-LEAD CERAMIC FLAT PACK TYPE F 0.828 (21.04) 0.812 (20.64) 0.007 (0.18) 0.004 (0.10) 0.370 (9.40) 0.270 (6.86) NOTE: ALL DIMENSIONS IN INCHES (IN PARENTHESES IN MILLIMETERS) PIN 1 INDEX 1 32 0.488 0.430 (10.93) 0.347 (8.82) 0.330 (8.38) 0.030 (0.76) MIN 19 0.019 (0.48) 0.015 (0.38) 0.50 (1.27) BSC 0.045 (1.14) MAX. 0.005 (0.13) MIN. 0.130 (3.30) 0.090 (2.29) 0.047 (1.19) 0.026 (0.66) 3926 FHD F20 ...

Page 20

... X28C512/X28C513 PACKAGING INFORMATION 32-LEAD PLASTIC LEADED CHIP CARRIER PACKAGE TYPE J 0.420 (10.67) 0.045 (1.14 0.495 (12.57) 0.485 (12.32) TYP. 0.490 (12.45) 0.453 (11.51) 0.447 (11.35) TYP. 0.450 (11.43) 0.300 (7.62) REF. PIN 1 NOTES: 1. ALL DIMENSIONS IN INCHES (IN PARENTHESES IN MILLIMETERS) 2. DIMENSIONS WITH NO TOLERANCE FOR REFERENCE ONLY 0.050 (1.27) TYP. 0.021 (0.53) 0.013 (0.33) SEATING PLANE TYP. 0.017 (0.43) CO – ...

Page 21

... X28C512/X28C513 PACKAGING INFORMATION 36-LEAD CERAMIC PIN GRID ARRAY PACKAGE TYPE 0.090 (2.29) 0.070 (1.78 0.090 (2.29) 0.070 (1.78) PIN 1 INDEX 0.770 (19.56) 0.750 (19.05) SQ. NOTE: ALL DIMENSIONS IN INCHES (IN PARENTHESES IN MILLIMETERS TYP. 0.100 (2.54) ALL LEADS ...

Page 22

... X28C512/X28C513 PACKAGING INFORMATION 32-LEAD PLASTIC DUAL IN-LINE PACKAGE TYPE P PIN 1 INDEX PIN 1 SEATING PLANE 0.160 (4.06) 0.125 (3.17) 0.110 (2.79) 0.090 (2.29) TYP. 0.010 (0.25) NOTE: 1. ALL DIMENSIONS IN INCHES (IN PARENTHESES IN MILLIMETERS) 2. PACKAGE DIMENSIONS EXCLUDE MOLDING FLASH 1.665 (42.29) 1.644 (41.76) 1.500 (38.10) REF. 0.070 (17.78) 0.022 (0.56) 0.030 (7.62) 0.014 (0.36) 0.625 (15.88) 0.590 (14.99) ...

Page 23

... X28C512/X28C513 PACKAGING INFORMATION 32-LEAD CERAMIC SMALL OUTLINE GULL WING PACKAGE TYPE R 0.340 0.007 0.0192 0.0138 0.840 MAX. 0.050 0.440 MAX. 0.560 NOM. NOTES: 1. ALL DIMENSIONS IN INCHES 2. FORMED LEAD SHALL BE PLANAR WITH RESPECT TO ONE ANOTHER WITHIN 0.004 INCHES SEE DETAIL “A” ...

Page 24

... X28C512/X28C513 PACKAGING INFORMATION 12.522 (0.493) 12.268 (0.483) 1.143 (0.045) 0.965 0.889 (0.035) PIN #1 IDENT. (0.038) O 1.016 (0.040) O 0.762 (0.030) 1 10.058 (0.396) 9.957 (0.392) A 14.148 (0.557) 13.894 (0.547) 14.80 0.05 (0.583 0.002) 0.30 (0.012 SOLDER PADS TYPICAL 40 PLACES 0.17 (0.007) 0.03 (0.001) FOOTPRINT NOTE: 1. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS (INCHES IN PARENTHESES). ...

Page 25

... A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system affect its satety or effectiveness. X28C512 X Device -X Access Time – ...

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