X3100 Xicor, X3100 Datasheet - Page 6

• Manufacturer Part Number: X3100
• Description: 3 or 4 Cell Li-Ion Battery Protection and Monitor IC
• Manufacturer: Xicor

X3100/X3101 – Preliminary Information
REV 1.1.8 12/10/02
(R
the charge FET is completely turned OFF when OVP/
LMON=V
The capacitors on the V
in a first order low pass filter configuration, at the battery
cell voltage monitoring inputs (VCELL1–VCELL4) of the
X3100 or X3101. This filter is used to block any
unwanted interference signals from being inadvertently
injected into the monitor inputs. These interference
signals may result from:
– Transients created at battery contacts when the bat-
– Electrostatic discharge (ESD) from something/some-
– Unfiltered noise that exists in the host device.
– RF signals which are induced into the battery pack
Such interference can cause the X3100 or X3101 to
operate in an unpredictable manner, or in extreme
cases, damage the device. As a guide, the capacitor
should be in the order of 0.01µF and the resistor, should
be in the order of 10KΩ . The capacitors should be of the
ceramic type. In order to minimize interference, PCB
tracks should be made as short and as wide as possible
to reduce their impedance. The battery cells should also
be placed as close to the X3100 or X3101 monitor inputs
as possible.
Resistors R
(Q
X3100 and X3101 provide internal drive circuitry which
allows the user to switch FETs Q
the microcontroller and SPI port (see section “Cell
Voltage Balance Control (CBC1-CBC4)” on page 11).
When any of the these FETs are switched ON, a
current, limited by resistor R
particular battery cell. In doing so, the user can control
the voltage across each individual battery cell. This is
important when using Li-Ion battery cells since
imbalances in cell voltages can, in time, greatly reduce
the usable capacity of the battery pack. Cell voltage
balancing may be implemented in various ways, but is
usually performed towards the end of cell charging
(“Top-of-charge method”). Values for R
according to the specific application.
The internal 4kbit EEPROM memory can be used to
store the cell characteristics for implementing such
functions as gas gauging, battery pack history, charge/
tery pack is being connected/disconnected from the
charger or the host.
one touching the battery contacts.
from the surrounding environment.
PU
6
–Q
) in the order of 1MΩ should be used to ensure that
9
) are used for battery cell voltage balancing. The
CC
CB
.
and the associated n-channel MOSFET’s
CELL1
to V
CB
CELL4
6
, flows across the
–Q
9
ON or OFF via
inputs are used
CB
will vary
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discharge cycles, and minimum/maximum conditions.
Battery pack manufacturing data as well as serial
number information can also be stored in the EEPROM
array. An SPI serial bus provides the communication link
to the EEPROM.
A current sense resistor (R
and monitor the current flowing into/out of the battery
terminals, and is used to protect the pack from over-
current
Protection” on page 18). R
externally monitor current via a microcontroller (see
section “Current Monitor Function” on page 20).
FETs Q4 and Q5 may be required on general purpose
I/Os of the microcontroller that connect outside of the
package. In some cases, without FETs, pull-up resistors
external to the pack force a voltage on the V
microcontroller during a pack sleep condition. This
voltage can affect the proper tuned voltage of the
X3100/X3101 regulator. These FETs should be turned-
on by the microcontroller. (See Figure 1.)
POWER ON SEQUENCE
Initial connection of the Li-Ion cells in the battery pack
will not normally power up the battery pack. Instead, the
X3100 or X3101 enters and remains in the SLEEP
mode. To exit the SLEEP mode, after the initial power up
sequence, or following any other SLEEP MODE, a
minimum of 16V (X3100 V
applied to the VCC pin, as would be the case during a
battery charge condition. (See Figure 2.)
When V
(AS2-AS0) and the SPI communication pins (CS, CLK,
SI, SO) must be low, so the X3100 and X3101 power up
correctly into the normal operating mode. This can be
done by using a power-on reset circuit.
When entering the normal operating mode, either from
initial power up or following the SLEEP MODE, all bits in
the control register are zero. With UVPC and OVPC bits
at zero, the charge and discharge FETs are off. The
microcontroller must turn these on to activate the pack.
The microcontroller would typically check the voltage
and current levels prior to turning on the FETs via the
SPI port. The software should prevent turning on the
FETs throughout an initial measurement/calibration
period. The duration of this period is T
T
UV
+200ms, whichever is longer.
SLR
conditions
is applied to VCC, the analog select pins
Characteristics subject to change without notice.
(see
SLR
SENSE
SENSE
) or 12V (X3101 V
section
) is used to measure
is also used to
OV
“Over-Current
CC
+200ms or
pin of the
SLR
6 of 40
) is