LM81CIMT-31 National Semiconductor, LM81CIMT-31 Datasheet - Page 19

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LM81CIMT-31

Manufacturer Part Number
LM81CIMT-31
Description
Serial Interface ACPI-Compatible Microprocessor System
Manufacturer
National Semiconductor
Datasheet
Functional Description
8.2 Temperature Interrupts
INT and T_CRIT_A outputs are provided for temperature in-
terrupt. Temperature interrupts have a normal and an ex-
tended option of operation. Each option has three different
modes of operation: Repetitive Interrupt, One-Time Interrupt
and Comparator.
Normal Repetitive Interrupt Mode is shown in Figure 11
and operates in the following way: T_CRIT_A is disabled.
Exceeding T
indefinitely until reset by reading Interrupt Status Register 1.
Once reset if the temperature remains above the T
setpoint the interrupt will again be activated at the comple-
tion of another conversion cycle. If temperature is less than
or equal to T
*
Note: Interrupt resets occur only when interrupt Status Register 1 is read.
FIGURE 11. Normal Repetitive Interrupt Response
HIGH
HIHYST
causes an interrupt that will remain active
the interrupt will not be activated.
Diagram
(Continued)
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HIHYST
19
Normal One-Time Interrupt Mode is shown in Figure 12
and operates in the following way: T_CRIT_A is disabled.
Exceeding T
indefinitely until reset by reading Interrupt Status Register 1.
Another interrupt will not occur until the temperature drops to
less than or equal to T
a subsequent conversion. After power up this mode is se-
lected as default.
*
Normal Comparator Mode is shown in Figure 13 and oper-
ates in the following way: T_CRIT_A is disabled. Exceeding
T
temperature is less than or equal to T
*
Note: Interrupt resets occur only when interrupt Status Register 1 is read.
Note: Interrupt resets occur only when interrupt Status Register 1 is read.
HIGH
FIGURE 12. One-Time Interrupt Response Diagram
causes an interrupt that will remain activated until the
FIGURE 13. Normal Comparator Mode
HIGH
causes an interrupt that will remain active
HIHYST
and then exceeds T
HIGH
. T
LOW
DS100072-18
DS100072-17
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HIGH
is disabled.
during

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