ATTIny13-12PI ATMEL Corporation, ATTIny13-12PI Datasheet - Page 70
ATTIny13-12PI
Manufacturer Part Number
ATTIny13-12PI
Description
8-bit AVR Microcontroller with 1K Bytes In-System Programmable Flash
Manufacturer
ATMEL Corporation
Datasheet
1.ATTINY13-12PI.pdf
(169 pages)
- Current page: 70 of 169
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Timer/Counter Register –
TCNT0
Output Compare Register A –
OCR0A
Output Compare Register B –
OCR0B
Timer/Counter Interrupt Mask
Register – TIMSK0
70
ATtiny13
Table 33. Clock Select Bit Description (Continued)
If external pin modes are used for the Timer/Counter0, transitions on the T0 pin will
clock the counter even if the pin is configured as an output. This feature allows software
control of the counting.
The Timer/Counter Register gives direct access, both for read and write operations, to
the Timer/Counter unit 8-bit counter. Writing to the TCNT0 Register blocks (removes)
the Compare Match on the following timer clock. Modifying the counter (TCNT0) while
the counter is running, introduces a risk of missing a Compare Match between TCNT0
and the OCR0x Registers.
The Output Compare Register A contains an 8-bit value that is continuously compared
with the counter value (TCNT0). A match can be used to generate an Output Compare
interrupt, or to generate a waveform output on the OC0A pin.
The Output Compare Register B contains an 8-bit value that is continuously compared
with the counter value (TCNT0). A match can be used to generate an Output Compare
interrupt, or to generate a waveform output on the OC0B pin.
• Bits 7..4, 0 – Res: Reserved Bits
These bits are reserved bits in the ATtiny13 and will always read as zero.
• Bit 3 – OCIE0B: Timer/Counter Output Compare Match B Interrupt Enable
When the OCIE0B bit is written to one, and the I-bit in the Status Register is set, the
Timer/Counter Compare Match B interrupt is enabled. The corresponding interrupt is
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
CS02
1
1
1
CS01
0
1
1
R/W
R/W
R/W
R
7
0
7
0
7
0
7
–
0
CS00
1
0
1
R/W
R/W
R/W
R
6
0
6
0
6
0
6
–
0
Description
clk
External clock source on T0 pin. Clock on falling edge.
External clock source on T0 pin. Clock on rising edge.
I/O
/1024 (From prescaler)
R/W
R/W
R/W
R
5
0
5
0
5
0
5
–
0
R/W
R/W
R/W
R
4
0
4
0
4
0
4
–
0
OCR0A[7:0]
OCR0B[7:0]
TCNT0[7:0]
OCIE0B
R/W
R/W
R/W
R/W
3
0
3
0
3
0
3
0
OCIE0A
R/W
R/W
R/W
R/W
2
0
2
0
2
0
2
0
TOIE0
R/W
R/W
R/W
R/W
1
0
1
0
1
0
1
0
R/W
R/W
R/W
0
0
0
0
0
0
0
–
R
0
2535B–AVR–01/04
OCR0A
OCR0B
TCNT0
TIMSK0
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