P80C528 Philips Semiconductors, P80C528 Datasheet
P80C528
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P80C528 Summary of contents
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... DATA SHEET P83C524; P80C528; P83C528 8-bit microcontrollers Product specification File under Integrated Circuits, IC20 INTEGRATED CIRCUITS 1997 Dec 15 ...
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... PACKAGE OUTLINES 27 SOLDERING 27.1 Introduction 27.2 DIP 27.2.1 Soldering by dipping or by wave 27.2.2 Repairing soldered joints 27.3 PLCC and QFP 27.3.1 Reflow soldering 27.3.2 Wave soldering 27.3.3 Repairing soldered joints 28 DEFINITIONS 29 LIFE SUPPORT APPLICATIONS 30 PURCHASE OF PHILIPS Auto-clock 2 C-bus 2 Product specification P83C524; P80C528; P83C528 2 C CHARACTERISTICS (BIT-LEVEL COMPONENTS ...
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... XTAL frequency range: 3.5 MHz to 16 MHz and 3.5 MHz to 24 MHz All packaging pin-outs fully compatible to the standard 8051/8052. 1997 Dec 15 P83C524; P80C528; P83C528 2 GENERAL DESCRIPTION The P83C524 and P83C528 single-chip 8-bit microcontrollers are manufactured in an advanced CMOS process and are derivatives of the PCB80C51 microcontroller family ...
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... Philips Semiconductors 8-bit microcontrollers 3 QUICK REFERENCE DATA SYMBOL PARAMETER P83C524, P80C528, P83C528 (see characteristics tables for extended temperature range versions) V supply voltage range DD I supply current: operating modes 16 MHz DD I supply current: Idle mode 16 MHz ID I supply current: Power-down mode PD P total power dissipation ...
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... PLCC44 plastic leaded chip carrier; 44 leads P83C528EFA P83C528IBA P83C528IFA P83C528EBB QFP44 plastic quad flat package; 44 leads (lead length 1.3 mm); P83C528EFB body 10 P83C528IBB P83C528IFB 1997 Dec 15 P83C524; P80C528; P83C528 PACKAGE DESCRIPTION 10 1. Product specification TEMPERATURE RANGE ( C) VERSION SOT129 + + +70 ...
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... T1 AUX - RAM RAM DATA DATA TWO 16-BIT MEMORY MEMORY TIMER/EVENT (256 x 8 RAM) (256 x 8 RAM) COUNTERS P83C524 P80C528 P83C528 PROGRAMMABLE SERIAL PORT PROGRAMMABLE I/O FULL DUPLEX UART SYNCHRONOUS SHIFT parallel ports, serial in serial out address/data bus and I/O pins shared with Port 3 Fig ...
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... INT1 alternative functions 1997 Dec RST XTAL1 XTAL2 EA PSEN P83C524 ALE P80C528 P83C528 P83C528 Port 3 MBC454 - 1 Fig.2 Functional diagram. 7 Product specification P83C524; P80C528; P83C528 address and Port 0 data bus T2 T2EX Port 1 SCL SDA address bus Port 2 ...
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... XTAL2 18 23 XTAL1 MBC453 Fig.3 Pin configuration DIP40 (SOT129-1). 8 Product specification P83C524; P80C528; P83C528 V DD P0.0 AD0 P0.1 AD1 P0.2 AD2 P0.3 AD3 P0.4 AD4 P0.5 AD5 P0.6 AD6 P0.7 AD7 EA ALE PSEN P2.7 A15 P2.6 A14 P2.5 A13 P2.4 A12 P2.3 A11 P2.2 A10 P2.1 A9 P2.0 A8 ...
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... P83C524 P80C528 P83C528 12 5 P83C528 Fig.4 Pin configuration QFP44 (SOT307-2). 9 Product specification P83C524; P80C528; P83C528 39 P0.4 / AD4 38 P0.5 / AD5 33 37 P0.6 / AD6 32 36 P0.7 / AD7 n. ALE 28 32 PSEN 27 31 P2.7 / A15 26 30 P2.6 / A14 ...
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... RXD / data / P3.0 n.c. TXD / clock / P3.1 INT0 / P3.2 INT1 / P3 P3 P3.5 1997 Dec P83C524 P83C528 12 P80C528 P83C528 Fig.5 Pin configuration PLCC44 (SOT187-2). 10 Product specification P83C524; P80C528; P83C528 39 P0.4 / AD4 38 P0.5 / AD5 37 P0.6 / AD6 36 P0.7 / AD7 n.c. 33 ALE 32 PSEN 31 P2.7 / A15 30 P2.6 / A14 29 P2.5 / A13 MBC452 ...
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... Philips Semiconductors 8-bit microcontrollers 7.2 Pin description Table 1 Pin description for P83C524, P80C528 and P83C528; see note 1 PIN SYMBOL SOT 129-1 SOT 187-2 SOT 307-2 P1.0 P1 n.c T2EX 2 3 SCL 7 8 SDA 8 9 RST 9 10 P3 (12 n.c.) RXD/data 10 11 ...
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... To avoid a 'latch-up' effect at power-on, the voltage on any pin (at any time) must not be higher than V lower than V 0.5 V respectively. SS 1997 Dec 15 P83C524; P80C528; P83C528 15 Crystal input 1: input to the inverting amplifier that forms the oscillator, and input to the internal clock generator. Receives the external oscillator clock signal when an external oscillator is used (see Figures 22 and 23) ...
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... WDT overflow, and in addition, by either of the two external interrupts. 8.2 Instruction Set Execution The P83C524, P80C528 and P83C528 use the powerful instruction set of the 80C51. Additional SFRs are incorporated to control the on-chip peripherals. The instruction set consists of 49 single-byte, 46 two-byte and 16 three-byte instructions ...
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... LOCATION RAM 0 to 127 RAM 128 to 255 AUX-RAM 0 to 255 Special Function Register (SFR) 128 to 255 1997 Dec 15 P83C524; P80C528; P83C528 ACCESS TO INTERNAL PROGRAM MEMORY YES NO An access to external data memory locations higher than 255 will be performed with the MOVX DPTR instructions in the same way as in the 80C51 structure, i ...
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... OUT P0 OUT a. Without a MOVX. cycle OUT P0 OUT b. With a MOVX to the AUX-RAM (read and write). Fig.7 Internal program memory execution. 15 Product specification P83C524; P80C528; P83C528 one machine cycle cycle MBC457 S5 S6 MBC458 ...
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... DPL OUT a. With a MOVX to the External Data Memory (read). cycle DPL OUT b. With a MOVX to the External Data Memory (write). 16 Product specification P83C524; P80C528; P83C528 cycle DPH OUT DATA IN cycle DPH OUT DATA OUT ...
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... S5 S6 INST ADDRL IN OUT (read) INST ADDRL IN OUT (write) b. With a MOVX to the AUX-RAM (read and write). Fig.9 External program memory execution. 17 Product specification P83C524; P80C528; P83C528 one machine cycle PCH OUT PCL INST PCL OUT IN OUT cycle ...
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... OUT a. With a MOVX to the External Data Memory (read). cycle PCH OUT INST DPL IN OUT b. With a MOVX to the External Data Memory (write). 18 Product specification P83C524; P80C528; P83C528 cycle DPH OUT DATA PCL IN OUT cycle ...
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... Fig.11 Internal and external data memory address space. 1997 Dec 15 SHARED ADDRESS LOCATION FF FF UPPER SPECIAL 128 BYTES FUNCTION INTERNAL REGISTERS RAM LOWER 128 BYTES INTERNAL RAM 00 DATA MEMORY register indirect addressing 19 Product specification P83C524; P80C528; P83C528 FFFF EXTERNAL DATA MEMORY 0100 direct byte addressing MBC466 - 1 ...
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... TH1 TH0 TL1 TL0 TF1 TR1 TF0 TR0 IE1 DPL P83C524; P80C528; P83C528 DIRECT BYTE ADDRESS (HEX) FFH F0H E0H DAH D9H WBF STR ENS D8H D0H ...
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... RAM. Bytes 0-255 of AUX-RAM can only be addressed indirectly via MOVX. SFR through Direct addressing at address locations 128-255. External data memory through Register-Indirect addressing. Program memory look-up tables through Base-Register plus Index-Register-Indirect addressing. 1997 Dec 15 P83C524; P80C528; P83C528 21 Product specification ...
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... Port 1 or Port 3 pin as an alternative function is carried out automatically by the P83C528 provided the associated SFR bit is HIGH. Otherwise the port pin is held at a logical LOW level. strong pull-up 2 oscillator periods p1 n INPUT BUFFER 22 Product specification P83C524; P80C528; P83C528 + I/O PIN PORT I1 MLA513 ...
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... The timers are started and stopped under software control. Each one sets its interrupt request flag when it overflows 1 of the oscillator 12 from all logic 1's to all logic 0's (respectively, the automatic reload value), with the exception of Mode 3 as previously described. 23 Product specification P83C524; P80C528; P83C528 ...
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... Timer 0: TL0 is an 8-bit timer/counter controlled by the standard Timer 0 control bits. TH0 is an 8-bit timer controlled by Timer 1 control bits Timer 1: Timer/counter 1 stopped. 1997 Dec 15 (TMOD) ONTROL REGISTER GATE 24 Product specification P83C524; P80C528; P83C528 TIMER 0 C/T M1 FUNCTION FUNCTION 0 M0 ...
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... Interrupt 0 edge flag: set by hardware when external interrupt is detected. Cleared when interrupt is processed. 0 IT0 Interrupt 0 type control bit: set/cleared by software to specify falling edge/LOW level triggered external interrupt. 1997 Dec 15 R (TCON) EGISTER TF0 TR0 IE1 25 Product specification P83C524; P80C528; P83C528 2 1 IT1 IE0 FUNCTION 0 IT0 ...
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... T2EX if EXEN2 = 1. When either RCLK = 1 or TCLK = 1, this bit is ignored and the timer is forced to reload upon overflow. 1997 Dec 15 TR2 1 16-bit automatic reload 1 16-bit capture 1 baud rate generator 0 OFF (T2CON RCLK TCLK EXEN2 26 Product specification P83C524; P80C528; P83C528 MODE 2 1 TR2 C/T2 FUNCTION 0 CP/RL2 ...
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... EXEN2 = 1, a HIGH-to-LOW transition at pin T2EX sets EXF2 and can be used to generate an interrupt. C/ TL2 (8 BITS) C/ control TR2 transition detector RCAP2L control EXEN2 Fig.14 Timer 2 in capture mode. 27 Product specification P83C524; P80C528; P83C528 AUD ATE ENERATOR ODE Timer 2 overflow rate = ------------------------------------------------------- - 16 oscillator frequency = ------------------------------------------------------------------------------------------------------ - ...
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... BITS) (8 BITS) control TR2 RCAP2L RCAP2H "TIMER 2" EXF2 interrupt (additional external interrupt) control EXEN2 Fig.16 Timer 2 in baud rate generator mode. 28 Product specification P83C524; P80C528; P83C528 TH2 TF2 (8 BITS) timer 2 interrupt RCAP2H EXF2 MBC469 - SMOD 1 0 RCLK ...
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... WDCON contains this hex value 1997 Dec 15 P83C524; P80C528; P83C528 inhibited to prevent timing problems due to asynchronous increments of T3. To prevent an overflow of the WDT, the user program has to reload T3 within periods that are shorter than the programmed Watchdog time interval. This time interval is determined by the 8-bit reload value that is written into register T3 ...
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... In fact, Mode 3 is the same as Mode 2 in all respects except the baud rate. The baud rate in Mode 3 is variable. 1997 Dec 15 P83C524; P80C528; P83C528 In all four modes, transmission is initiated by any instruction that uses SBUF as a destination register. In Mode 0, reception is initiated by the condition and REN = 1 ...
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... Dec SM2 REN TB8 DESCRIPTION shift register 8-bit UART 9-bit UART 9-bit UART 31 Product specification P83C524; P80C528; P83C528 2 1 RB8 TI FUNCTION BAUD RATE OSC variable OSC 64 OSC variable 0 RI ...
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... START and STOP conditions generating serial clock pulses if S1BIT is not used hardware compared Three SFRs control the bit-level I S1BIT and S1SCS. 32 P83C524; P80C528; P83C528 2 C START interrupts 2 C status if RBF or WBF = 0. handling bus arbitration 2 C interface: S1INT, ...
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... IB5 RSBIT S Q WSBIT interrupt S Q logic STA R SDIQN SDOQ 2 Fig.18 Bit level I C interface block diagram. 33 Product specification P83C524; P80C528; P83C528 Q D SDO WSBIT C WSCS DIS RSCS Q D SCO C WSCS RSBIT WSBIT RSCS FSCL S Q CLH R RSCS ...
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... S1SCS.7. S1BIT SFR is not bit-addressable don't care. 1997 Dec 15 ( FUNCTION 2 C Auto-clock (S1BIT) 2 (1) C Auto-clock (address D9H FUNCTION 34 Product specification P83C524; P80C528; P83C528 ...
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... SDO = 1 and SDI = 0. 2 C-bus (S1SCS) 2 C-bus (address D8H (2) CLH BB RBF (2) CLH X 35 Product specification P83C524; P80C528; P83C528 (3) (4) WBF STR X X STR 0 ENS ENS ...
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... CLH = 1: SCL had a rising edge SCI = 0: the SCL pulse has finished START condition occurred STOP condition occurred 2 C slave mode to react on a fast master. The STR flag remains set 36 Product specification P83C524; P80C528; P83C528 FUNCTION 2 C-bus hardware. Note that the SDO and ...
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... T2CON.3/EXEN2 = 1, a HIGH-to-LOW transition at pin P1.1/T2EX sets the interrupt request flag T2CON.6/EXF2 and can be used to generate an external interrupt. 1997 Dec 15 P83C524; P80C528; P83C528 2 The I C interrupt is generated S1INT. This flag has to be cleared by software. All of the bits that generate ...
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... EX0 enable External interrupt 0 14.2 Interrupt Priority Register (IP) Table 23 Interrupt Priority register (address B8H PS1 1997 Dec ET2 ES ET1 2 C I/O interrupt PT2 PS PT1 38 Product specification P83C524; P80C528; P83C528 2 1 EX1 ET0 FUNCTION 2 1 PX1 PT0 0 EX0 0 PX0 ...
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... Table 25 Interrupt vectors NUMBER 1 IE0 2 TF2+EXF2 TF0 5 IE1 6 TF1 1997 Dec interrupt priority level SOURCE PRIORITY WITHIN LEVEL (highest) (lowest) 39 Product specification P83C524; P80C528; P83C528 FUNCTION VECTOR ADDRESS 0003H 002BH 0053H 000BH 0013H 001BH 0023H ...
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... Dec 15 The Power-down operation freezes the oscillator. The Power-down mode can only be activated by setting the PD bit in the PCON register (see Fig.20). XTAL1 OSCILLATOR CLOCK GENERATOR PD 40 Product specification P83C524; P80C528; P83C528 interrupts serial ports timer blocks CPU IDL MBC477 - 1 ...
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... If logic 1s are written to PD and IDL at the same time, PD takes precedence. 2. User software should not write 1s to reserved bits. These bits may be used in future 80C51 family products to invoke new features. 1997 Dec GF1 FUNCTION 41 Product specification P83C524; P80C528; P83C528 2 1 GF0 PD 0 IDL ...
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... Power-down internal Power-down external 1997 Dec 15 P83C524; P80C528; P83C528 The second way of terminating the Idle mode is with an external hardware reset. Since the oscillator is still running, the hardware reset is required to be active for two machine cycles (24 oscillator periods) to complete the reset operation. ...
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... Power-down mode will be the first one which will be executed after an interrupt has been serviced. internal timing stopped power down oscillator stopped INT0 / INT1 1997 Dec 15 P83C524; P80C528; P83C528 Table 29 Internal registers status after a RESET REGISTER ACC B DPH, DPL IE IP ...
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... RST is pulled HIGH and is repeated every cycle until RST goes LOW. It leaves the internal registers as shown by Table 29. handbook, halfpage XTAL1 RST XTAL2 MBC472 44 Product specification P83C524; P80C528; P83C528 V DD SCHMITT TRIGGER RESET CIRCUITRY on-chip resistor R RST Fig.24 On-chip reset configuration. ...
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... Fig.25 handbook, halfpage 2.2 F P83C528 RST Fig.25 Power-on reset. 1997 Dec 15 must remain above RST RST MBC474 45 Product specification P83C524; P80C528; P83C528 ...
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... Increment A Increment register Increment direct byte Increment indirect RAM Decrement A Decrement register Decrement direct byte Decrement indirect RAM Increment data pointer Multiply A and B Divide Decimal adjust A 46 Product specification P83C524; P80C528; P83C528 BYTES CYCLES ...
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... Exclusive- direct byte Exclusive-OR immediate data to direct byte Clear A Complement A Rotate A left Rotate A left through the carry flag Rotate A right Rotate A right through the carry flag Swap nibbles within A 47 Product specification P83C524; P80C528; P83C528 BYTES CYCLES ...
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... Move A to external RAM (16-bit address) Push direct byte onto stack Pop direct byte from stack Exchange register with A Exchange direct byte with A Exchange indirect RAM with A Exchange LOW-order digit indirect RAM with A 48 Product specification P83C524; P80C528; P83C528 BYTES CYCLES ...
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... Compare immediate to A and jump if not equal Compare immediate to register and jump if not equal Compare immediate to indirect and jump if not equal Decrement register and jump if not zero Decrement direct and jump if not zero No operation 49 Product specification P83C524; P80C528; P83C528 BYTES CYCLES ...
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... Signed (two's complement) 8-bit offset byte. Used by SJMP and all conditional jumps. Range is 128 to +127 bytes relative to first byte of the following instruction. Hexadecimal opcode cross-reference * 11, 31, 51, 71, 91, B1, D1, F1. 01, 21, 41, 61, 81, A1, C1, E1. 1997 Dec 15 P83C524; P80C528; P83C528 DESCRIPTION 50 Product specification ...
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Acrobat reader. white to force landscape pages to be ... First hexadecimal character of opcode AJMP LJMP 0 NOP addr11 addr16 ...
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... V supply voltage range DD V all input voltages I P total power dissipation tot T storage temperature range stg T operating ambient temperature range: amb version xBx version xFx 1997 Dec 15 P83C524; P80C528; P83C528 PARAMETER 52 Product specification MIN. MAX. UNIT 0.5 +6.0 V 0 +150 ...
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... 5 1.6 mA; notes 6 and 3.2 mA; notes 4 and 3.0 mA; note 10 Product specification P83C524; P80C528; P83C528 unless otherwise SS MIN. MAX. 4.5 5 7.5 ; note 3 100 0.5 0.2 V 0.5 0.2 V 0.5 0.3 V 0.2 V +0 ...
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... DD 0.5 V; XTAL2 not connected; the WDT is disabled RST = Port 0 = P1 will be recognized as a logic 1. DD must be externally limited as follows: OL exceeds the test condition Product specification P83C524; P80C528; P83C528 MIN. 2.4 0.75V DD 0. 150 specification voltage below 0.3 V MAX ...
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... Valid only within frequency specifications of device under test. 1997 Dec (MHz) Fig. function of frequency Product specification P83C524; P80C528; P83C528 MBC478 MAX ACTIVE MODE TYP ACTIVE MODE MAX IDLE MODE TYP IDLE MODE 24 ...
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... WR transition QVWX t data set-up time before WR QVWH t data hold time after WR WHQX t address float delay after RD RLAZ 1997 Dec 15 P83C524; P80C528; P83C528 = 80 pF for all other outputs unless L 16 MHZ VARIABLE CLOCK MIN. MAX. MIN ...
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... P83C52x EFx 10 min. = 1/f max. (maximum operating frequency The maximum operating frequency is limited to 16/24 MHz and the minimum to 3.5 MHz (all versions Ixx/Exx). 1997 Dec 15 P83C524; P80C528; P83C528 = 80 pF for all other outputs unless otherwise L 24 MHZ MIN. MAX ...
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... Spikes on SDA and SCL lines with a duration of less than 4 5. The RISE time is determined by the external bus line capacitance and pull-up resistor, it must The maximum capacitance on bus lines SDA and SCL is 400 pF. 1997 Dec 15 P83C524; P80C528; P83C528 INPUT note 1 ...
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... XHDV 1997 Dec 15 PARAMETER 3 0 Load Capacitance = MHZ OSCILLATOR MIN. 0.5 283 Product specification P83C524; P80C528; P83C528 VARIABLE CLOCK MIN. MAX. 24 MHz 286 LOW HIGH ...
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Acrobat reader. white to force landscape pages to be ... START or repeated START condition t RD SDA (input / output ...
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... LHLL handbook, full pagewidth ALE t AVLL PSEN PORT 0 PORT 2 1997 Dec 15 t LLPL t PLPH t LLIV t PLIV t LLAX t PLAZ t PXIX INSTR IN t AVIV A8 - A15 Fig.28 External program memory read cycle. 61 Product specification P83C524; P80C528; P83C528 t PXIZ A15 MBC483 - 1 ...
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Acrobat reader. white to force landscape pages to be ... ALE PSEN t LLWL RD t AVLL t LLAX PORT 0 ...
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Acrobat reader. white to force landscape pages to be ... ALE PSEN t LLWL AVLL LLAX PORT 0 ...
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... See Table 36. 1997 Dec 15 2.0 V 2.4 V test points 0.8 V (a) float 2.0 V 0.8 V (b) t HIGH IH1 V IH1 0.8 V 0 LOW t CK Fig.32 External clock drive XTAL1. 64 Product specification P83C524; P80C528; P83C528 2.0 V 0.8 V 2.4 V 2.0 V 0.8 V 0.45 V MBC480 IH1 V IH1 0.8 V MBC479 ...
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... WRITE TO SBUF INPUT DATA CLEAR RI See Table 37. 1997 Dec XLXL t XHQX t QVXH t XHDX t XHDV VALID VALID VALID Fig.33 Shift register mode timing waveforms. 65 Product specification P83C524; P80C528; P83C528 VALID VALID VALID VALID MBC475 8 SET TI VALID SET RI ...
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... address A8 - A15 address A8 - A15 or Port 2 out old data sampling time of I/O port pins during input (including INT0 and INT1) Fig.34 Instruction cycle timing. 66 Product specification P83C524; P80C528; P83C528 one machine cycle inst ...
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... L = Logic level LOW or ALE P = PSEN Q = output data signal t = time V = valid signal longer a valid logic level Z = float Examples time for address valid to ALE LOW AVLL t = time for ALE LOW to PSEN LOW LLPL 1997 Dec 15 P83C524; P80C528; P83C528 67 Product specification ...
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... Dec scale (1) ( 1.70 0.53 0.36 52.50 14.1 1.14 0.38 0.23 51.50 13.7 0.067 0.021 0.014 2.067 0.56 0.045 0.015 0.009 2.028 0.54 REFERENCES JEDEC EIAJ MO-015AJ 68 P83C524; P80C528; P83C528 3.60 15.80 17.42 2.54 15.24 3.05 15.24 15.90 0.14 0.62 0.10 0.60 0.12 0.60 EUROPEAN PROJECTION Product specification SOT129-1 M ...
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... 0.81 16.66 16.66 16.00 16.00 1.27 0.66 16.51 16.51 14.99 14.99 0.032 0.656 0.656 0.630 0.630 0.05 0.026 0.650 0.650 0.590 0.590 REFERENCES JEDEC EIAJ MO-047AC 69 P83C524; P80C528; P83C528 detail max. 17.65 17.65 1.22 1.44 0.51 0.18 0.18 17.40 17.40 1.07 1.02 0.695 ...
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... 2.5 scale (1) ( 0.40 0.25 10.1 10.1 12.9 0.8 0.20 0.14 9.9 9.9 12.3 REFERENCES JEDEC EIAJ 70 P83C524; P80C528; P83C528 detail 12.9 0.95 0.85 1.3 0.15 0.15 12.3 0.55 0.75 EUROPEAN PROJECTION Product specification SOT307 (1) (1) ...
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... Drypack chapter in our “Quality Reference Handbook” (order code 9397 750 00192). 1997 Dec 15 P83C524; P80C528; P83C528 Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. Several methods exist for reflowing ...
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... C. C COMPONENTS 2 C components conveys a license under the Philips’ system provided the system conforms to the I 72 Product specification P83C524; P80C528; P83C528 R EPAIRING SOLDERED JOINTS 2 C patent to use the 2 C specification defined by ...
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... Philips Semiconductors 8-bit microcontrollers 1997 Dec 15 P83C524; P80C528; P83C528 NOTES 73 Product specification ...
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... Philips Semiconductors 8-bit microcontrollers 1997 Dec 15 P83C524; P80C528; P83C528 NOTES 74 Product specification ...
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... Philips Semiconductors 8-bit microcontrollers 1997 Dec 15 P83C524; P80C528; P83C528 NOTES 75 Product specification ...
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... Tel. +46 8 632 2000, Fax. +46 8 632 2745 Switzerland: Allmendstrasse 140, CH-8027 ZÜRICH, Tel. +41 1 488 2686, Fax. +41 1 481 7730 Taiwan: Philips Semiconductors, 6F, No. 96, Chien Kuo N. Rd., Sec. 1, TAIPEI, Taiwan Tel. +886 2 2134 2865, Fax. +886 2 2134 2874 Thailand: PHILIPS ELECTRONICS (THAILAND) Ltd., 209/2 Sanpavuth-Bangna Road Prakanong, BANGKOK 10260, Tel ...