M37544G Mitsubishi Electric, M37544G Datasheet - Page 30

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M37544G

Manufacturer Part Number
M37544G
Description
Single-Chip 8-Bit CMOS Microcomputer
Manufacturer
Mitsubishi Electric
Datasheet

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Watchdog Timer
The watchdog timer gives a means for returning to a reset status
when the program fails to run on its normal loop due to a runaway.
The watchdog timer consists of an 8-bit watchdog timer H and an
8-bit watchdog timer L, being a 16-bit counter.
Standard operation of watchdog timer
The watchdog timer stops when the watchdog timer control regis-
ter (address 0039
value to the watchdog timer control register (address 0039
causes the watchdog timer to start to count down. When the
watchdog timer H underflows, an internal reset occurs. Accord-
ingly, it is programmed that the watchdog timer control register
(address 0039
When the watchdog timer control register (address 0039
read, the values of the high-order 6-bit of the watchdog timer H,
STP instruction disable bit and watchdog timer H count source se-
lection bit are read.
Initial value of watchdog timer
By a reset or writing to the watchdog timer control register (ad-
dress 0039
watchdog timer L is set to “FF
Fig. 33 Block diagram of watchdog timer
Fig. 34 Structure of watchdog timer control register
30
b7
16
), the watchdog timer H is set to “FF
16
X
IN
) can be set before an underflow occurs.
16
RESET
) is not set after reset. Writing an optional
STP Instruction disable bit
16
”.
Write “FF
watchdog timer
control register
STP Instruction
1/16
16
” to the
b0
Watchdog timer L (8)
Watchdog timer control register
(WDTCON: address 0039
Watchdog timer H (read only for high-order 6-bit)
STP instruction disable bit
0 : STP instruction enabled
1 : STP instruction disabled
Watchdog timer H count source selection bit
0 : Watchdog timer L underflow
1 : f(X
16
” and the
16
IN
) is
16
)/16
)
“0”
“1”
Watchdog timer H count
source selection bit
Operation of STP instruction disable bit
When the watchdog timer is in operation, the STP instruction can
be disabled by bit 6 of the watchdog timer control register (ad-
dress 0039
Operation of watchdog timer H count source selection bit
A watchdog timer H count source can be selected by bit 7 of the
watchdog timer control register (address 0039
“0”, the count source becomes a watchdog timer L underflow sig-
nal. The detection time is 131.072 ms at f(X
When this bit is “1”, the count source becomes f(X
case, the detection time is 512 s at f(X
This bit is cleared to “0” after reset.
When this bit is “0”, the STP instruction is enabled.
When this bit is “1”, the STP instruction is disabled, and an inter-
nal reset occurs if the STP instruction is executed.
Once this bit is set to “1”, it cannot be changed to “0” by program.
This bit is cleared to “0” after reset.
Watchdog timer H (8)
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
16
).
Reset
circuit
16
, initial value: 3F
MITSUBISHI MICROCOMPUTERS
Data bus
Internal reset
Write "FF
watchdog timer
control register
IN
16
7544 Group
)=8 MHz.
16
IN
)
" to the
)=8 MHz.
16
). When this bit is
IN
)/16. In this

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