COP8SG National Semiconductor, COP8SG Datasheet - Page 49

• Manufacturer Part Number: COP8SG
• Description: 8-Bit CMOS ROM Based and OTP Microcontrollers with 8k to 32k Memory/ Two Comparators and USART
• Manufacturer: National Semiconductor

14.0 Instruction Set
14.4.9 No-Operation Instruction
The no-operation instruction does nothing, except to occupy
space in the program memory and time in execution.
Note: The VIS is a special case of the Indirect Transfer of Control addressing
14.5 REGISTER AND SYMBOL DEFINITION
The following abbreviations represent the nomenclature
used in the instruction description and the COP8
cross-assembler.
14.6 INSTRUCTION SET SUMMARY
ADD
ADC
SUBC
AND
ANDSZ
OR
XOR
IFEQ
IFEQ
IFNE
IFGT
IFBNE
DRSZ
SBIT
RBIT
IFBIT
RPND
X
X
LD
LD
LD
LD
LD
X
X
A
B
X
SP
PC
PU
PL
No-Operation (NOP)
mode, where the double byte vector associated with the interrupt is
transferred from adjacent addresses in the program memory into the
program counter (PC) in order to jump to the associated interrupt ser-
vice routine.
A,Meml
A,Meml
A,Meml
A,Meml
A,Imm
A,Meml
A,Meml
MD,Imm
A,Meml
A,Meml
A,Meml
#
Reg
# ,Mem
# ,Mem
# ,Mem
A,Mem
A,[X]
A,Meml
A,[X]
B,Imm
Mem,Imm
Reg,Imm
A, [B
A, [X
8-Bit Accumulator Register
8-Bit Address Register
8-Bit Address Register
8-Bit Stack Pointer Register
15-Bit Program Counter Register
Upper 7 Bits of PC
Lower 8 Bits of PC
±
±
]
]
Registers
ADD
ADD with Carry
Subtract with Carry
Logical AND
Logical AND Immed., Skip if Zero
Logical OR
Logical EXclusive OR
IF EQual
IF EQual
IF Not Equal
IF Greater Than
If B Not Equal
Decrement Reg., Skip if Zero
Set BIT
Reset BIT
IF BIT
Reset PeNDing Flag
EXchange A with Memory
EXchange A with Memory [X]
LoaD A with Memory
LoaD A with Memory [X]
LoaD B with Immed.
LoaD Memory Immed.
LoaD Register Memory Immed.
EXchange A with Memory [B]
EXchange A with Memory [X]
(Continued)
49
C
HC
GIE
VU
VL
[B]
[X]
MD
Mem
Meml
Imm
Reg
Bit
A A + Meml
A A + Meml + C, C Carry,
HC Half Carry
A A − MemI + C, C Carry,
HC Half Carry
A A and Meml
Skip next if (A and Imm) = 0
A A or Meml
A A xor Meml
Compare MD and Imm, Do next if MD = Imm
Compare A and Meml, Do next if A = Meml
Compare A and Meml, Do next if A
Compare A and Meml, Do next if A
Do next if lower 4 bits of B
Reg Reg − 1, Skip if Reg = 0
1 to bit, Mem (bit = 0 to 7 immediate)
0 to bit, Mem
If bit # , A or Mem is true do next instruction
Reset Software Interrupt Pending Flag
A
A
A Meml
A [X]
B Imm
Mem Imm
Reg Imm
A
A
Mem
[X]
[B], (B B
[X], (X X
1 Bit of PSW Register for Carry
1 Bit of PSW Register for Half Carry
1 Bit of PSW Register for Global Interrupt
Enable
Interrupt Vector Upper Byte
Interrupt Vector Lower Byte
Memory Indirectly Addressed by B Register
Memory Indirectly Addressed by X Register
Direct Addressed Memory
Direct Addressed Memory or [B]
Direct Addressed Memory or [B] or
Immediate Data
8-Bit Immediate Data
Register Memory: Addresses F0 to FF
(Includes B, X and SP)
Bit Number (0 to 7)
Loaded with
Exchanged with
±
±
1)
1)
Registers
Symbols
Imm
>
Meml
Meml
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