W78E58B Winbond, W78E58B Datasheet
W78E58B
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W78E58B Summary of contents
Page 1
... The instruction set of the W78E58B is fully compatible with the standard 8052. The W78E58B contains a 32K bytes of main ROM and a 4K bytes of auxiliary ROM which allows the contents of the 32KB main ROM to be updated by the loader program located at the 4KB auxiliary ROM ...
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... PSEN 13 28 P2.7, A15 INT1, P3.3 14 T0, P3.4 27 P2.6, A14 15 T1, P3.5 P2.5, A13 P3.6 25 P2.4, A12 17 24 P2.3, A11 RD, P3 P2.2, A10 XTAL2 XTAL1 19 22 P2. VSS 21 P2.0, A8 44-Pin QFP (W78E58BF P0.4, AD4 38 P0.5, AD5 37 P0.6, AD6 36 P0.7, AD7 RXD, P3 INT2, P4.3 34 P4.1 TXD, P3.1 33 ALE INT0, P3.2 32 PSEN INT1, P3.3 31 P2.7, A15 T0, P3 ...
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... I/O H PORT 2: Port bi-directional I/O port with internal pull-ups. This port also P2.0 P2.7 provides the upper address bits for accesses to external memory. I/O H PORT 3: Function is the same as that of the standard 8052. P3.0 P3.7 I/O H PORT 4: A bi-directional I/O. See details below. P4.0 P4.3 * Note: TYPE I: input, O: output, I/O: bi-directional, H: pull-high, L: pull-low, D: open drain DESCRIPTIONS Publication Release Date: March 18, 2002 - 3 - W78E58B Revision A3 ...
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... The processor supports 111 different opcodes and references both a 64K program address space and a 64K data storage space. RAM The internal data RAM in the W78E58B is 512 bytes divided into two banks: 256 bytes of scratchpad RAM and 256 bytes of AUX-RAM. These RAMs are addressed by different ways. RAM 0H 7FH can be addressed directly and indirectly as the same as in 8051 ...
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... Timers 0 and 1. Clock The W78E58B is designed with either a crystal oscillator or an external clock. Internally, the clock is divided by two before it is used by default. This makes the W78E58B relatively insensitive to duty cycle variations in the clock. Crystal Oscillator The W78E58B incorporates a built-in crystal oscillator. To make the oscillator work, a crystal must be connected across pins XTAL1 and XTAL2 ...
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... An internal trigger circuit in the reset line is used to deglitch the reset line when the W78E58B is used with an external RC network. The reset logic also has a special glitch removal circuit that ignores glitches on the reset line. During reset, the ports are initialized to FFH, the stack pointer to 07H, PCON (with the exception of bit 4) to 00H, and all of the other SFR registers except SBUF to 00H ...
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... XICON register, one can use the "SETB ( CLR ) bit" instruction. For example, "SETB 0C2H" sets the EX2 bit of XICON. P42AL 00000000 P41AL 00000000 TL0 TL1 TH0 00000000 00000000 DPL DPH P40AL 00000000 00000000 I if enabled W78E58B P42AH P2ECON 00000000 0000xx00 P41AH 00000000 TH1 00000000 P40AH PCON 00000000 00110000 Publication Release Date: March 18, 2002 Revision ...
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... Mode 3. P4 Read/Write Strobe signal for chip select purpose. The address range depends on the SFR P43AH, P43AL, P43CMP1, and P43CMP0. IT3 PX2 EX2 POLLING SEQUENCE WITHIN PRIORITY LEVEL 0 (highest (lowest) FUNCTION - 8 - W78E58B IE2 IT2 ENABLE INTERRUPT REQUIRED TYPE SETTINGS EDGE/LEVEL IE.0 TCON.0 IE.1 - IE.2 TCON.2 IE ...
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... The similarity definition as P43SINV. 4 P40CSINV The similarity definition as P43SINV Reserve 2 - Reserve FUNCTION A1) of address bus with the base address A2) of address bus with the base address A8) of address bus with the base address FUNCTION FUNCTION Publication Release Date: March 18, 2002 - 9 - W78E58B Revision A3 ...
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... P4.3 are used as general I/O ports. ; Base I/O address 1234H for P4.0 ; P4.0 a write strobe signal and address line A0 and A1 are masked. ; P4.1 P4.3 as general I/O port which are the same as PORT1 ; Write the P40SINV = 1 to inverse the P4.0 write strobe polarity ; default is negative W78E58B 1237H) will generate the positive ...
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... P4xCMP1 In-System Programming (ISP) Mode The W78E58B equips one 32K byte of main ROM bank for application program (called APROM) and one 4K byte of auxiliary ROM bank for loader program (called LDROM). In the normal operation, the microcontroller executes the code in the APROM. If the content of APROM needs to be modified, the W78E58B allows user to activate the In-System Programming (ISP) mode by setting the CHPCON register ...
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... Erase 4KB LDROM Program 4KB LDROM Read 4KB LDROM FUNCTION CTRL<3:0> OEN 0 0010 1 0 0001 1 0 0000 0 1 0010 1 1 0001 1 1 0000 W78E58B CEN SFRAH, SFRAL SFRFD Address in Data in 0 Address in Data out Address in Data in 0 Address in Data out X X ...
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... User can press both two buttons at the same time and then turn on the power of the personal computer to force the W78E58B to enter the F04KBOOT mode. After power on of personal computer, you can release both buttons and finish the in-system programming procedure to update the APROM code ...
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... F04KBOOT Mode P4.3 P2.7 P2.6 MODE FO4KBOOT FO4KBOOT The Reset Timing For Entering P2.7 P2.6 RST F04KBOOT Mode Hi-Z Hi W78E58B ...
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... In-System Programming mode) CPU will be wakened by interrupt and re-boot from 4KB LDROM to execute the loader program. Go Part 1:32KB APROM procedure of entering In-System Programming Mode Execute the normal application program END Publication Release Date: March 18, 2002 - 15 - W78E58B Revision A3 ...
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... MOV CHPCON,#83H Setting control registers for programming: MOV SFRAH,#ADDRESS_H MOV SFRAL,#ADDRESS_L MOV SFRFD,#DATA MOV SFRCN,#21H Executing new code from address 00H in the 32KB APROM W78E58B Yes No Hardware Reset to re-boot from new 32 KB APROM. (S/W reset is invalid in F04KBOOT Mode) END ...
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... Reserved bits must be kept in logic 1. Lock Bit This bit is used to protect the customer's program code in the W78E58B. It may be set after the programmer finishes the programming and verifies sequence. Once this bit is set to logic 0, both the ROM data and Security Register can not be accessed again. ...
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... Oscillator Control W78E58B/E516 allow user to diminish the gain of on-chip oscillator amplifier by using programmer to set the bit B7 of security register. Once B7 is set half of gain will be decreased. Care must be taken if user attempts to diminish the gain of oscillator amplifier, reducing a half of gain may improperly affect the external crystal operation at high frequency above 24 MHz ...
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... V +0.2 IH1 DD V 3.5 V +0.2 IH2 DD V 3.5 V +0.2 IH3 0.45 OL1 V - 0.45 OL2 Isk1 4 12 Isk2 2.4 - OH1 V 2.4 - OH2 Isr1 -120 -250 Isr2 -8 - W78E58B TEST CONDITIONS UNIT 0.45V ...
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... AAH APL PDA PDH PDZ ALW PSW W78E58B ), and actual parts will usually MAX. UNIT NOTES 40 MHz MAX. UNIT NOTES - ...
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... T - DWD DWR CP CP SYMBOL MIN. TYP TCP - PDS PDH T 1 TCP - PDA Publication Release Date: March 18, 2002 - 21 - W78E58B MAX. UNIT NOTES CP MAX. UNIT ...
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... Code Data Read Cycle S4 S5 XTAL1 ALE PSEN PORT 2 A0-A7 PORT ALW T APL T PSW T AAS T PDA T T PDH, PDZ A0-A7 A0-A7 Code Data A8-A15 DATA T T DAR DDA T DDH, T DRD - 22 - W78E58B A0-A7 Data A0- DDZ ...
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... ALE PSEN PORT 2 PORT 0 A0-A7 WR Port Access Cycle XTAL1 ALE T PORT INPUT SAMPLE A8-A15 DATA OUT T DAD T T DWR DAW PDS PDH - 23 - W78E58B DWD S1 T PDA DATA OUT Publication Release Date: March 18, 2002 Revision A3 ...
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... P2.1 23 A10 P2.2 24 A11 P2.3 74LS373 25 A12 P2.4 26 A13 P2.5 27 A14 P2.6 28 A15 P2 PSEN 30 ALE 11 TXD 10 RXD Figure A C1 47P 30P 15P W78E58B ...
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... A14 28 P2 PSEN 30 ALE 11 TXD 10 RXD Figure Notes Base Plane A 1 Seating Plane Publication Release Date: March 18, 2002 - 25 - W78E58B AD0 AD1 AD2 AD3 A3 D3 AD4 A4 A4 ...
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... Detail W78E58B Dimension in inch Dimension in mm Symbol Min. Nom. Max. Min. Nom. Max. A 0.185 4.699 A 0.020 0.508 1 A 0.145 0.150 3.683 3.81 3.937 0.155 2 0.026 0.028 b 0.032 0.66 0.711 ...
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... APPLICATION NOTES In-system Programming Software Examples This application note illustrates the in-system programmability of the Winbond W78E58B ROM microcontroller. In this example, microcontroller will boot from 32KB APROM bank and waiting for a key to enter in-system programming mode for re-programming the contents of 32KB APROM. While entering in-system programming mode, microcontroller executes the loader program in 4KB LDROM bank ...
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... IP = 00H ; TIMER0 INTERRUPT ENABLE FOR WAKE-UP FROM IDLE MODE ; TL0 = F0H ; TH0 = FFH ; TMOD = 01H, SET TIMER0 A 16-BIT TIMER ; TCON = 10H, TR0 = ENTER IDLE MODE FOR LAUNCHING THE IN-SYSTEM ; PROGRAMMING ; User's application program ; JUMP TO MAIN PROGRAM ; TR0 = 0, STOP TIMER0 - 28 - W78E58B ...
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... MOV SFRAL, #0H MOV R6, #FEH ; SET TIMER FOR READ OPERATION, ABOUT 1.5 S. MOV R7, #FFH MOV TL0, R6 MOV TH0, R7 BLANK_CHECK_LOOP: SETB TR0 ; ENABLE TIMER 0 MOV PCON, #01H ; ENTER IDLE MODE MOV A, SFRFD ; READ ONE BYTE CJNE A, #FFH, BLANK_CHECK_ERROR Publication Release Date: March 18, 2002 - 29 - W78E58B Revision A3 ...
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... SET TIMER FOR READ VERIFY, ABOUT 1.5 S. MOV R7, #FFH MOV TL0, R6 MOV TH0, R7 MOV DPTR, #0H ; The start address of sample code MOV R2, #0H ; Target low byte address MOV R1, #0H ; Target high byte address MOV SFRAH SFRAH, Target high address MOV SFRCN, #00H ; SFRCN = 00 (Read ROM CODE W78E58B ...
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... FAX: 1-408-5441798 Winbond Electronics Corporation Japan 7F Daini-ueno BLDG, 3-7-18 Shinyokohama Kohoku-ku, Yokohama, 222-0033 TEL: 81-45-4781881 FAX: 81-45-4781800 - 31 - W78E58B Winbond Electronics (Shanghai) Ltd. 27F, 2299 Yan An W. Rd. Shanghai, 200336 China TEL: 86-21-62365999 FAX: 86-21-62365998 Winbond Electronics (H.K.) Ltd. Unit 9-15, 22F, Millennium City, No. 378 Kwun Tong Rd., ...