AK5354VT Asahi Kasei Microsystems, AK5354VT Datasheet - Page 11
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AK5354VT
Manufacturer Part Number
AK5354VT
Description
LOW POWER 20 BIT ADC WITH PGA
Manufacturer
Asahi Kasei Microsystems
Datasheet
1.AK5354VT.pdf
(19 pages)
Available stocks
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Part Number
Manufacturer
Quantity
Price
Part Number:
AK5354VT
Manufacturer:
AKM
Quantity:
20 000
ASAHI KASEI
n Timing of Control Register
The internal registers are written by the 3-wire P interface pins: CSN, CCLK, CDTI. These data are included by Op-code
(3bit), Address (LSB-first, 5bit) and Control data (LSB-first, 8bit). A side of transmitted data is output to each bit by “ ”
of CCLK, a side of receiving data is input by “ ” of CCLK. Writing of data becomes effective by “ ” of CSN. CSN should
be held to “H” at no access.
Address except 00H 03H inhibits control of writing. And CCLK always need 16 edges of “ ” during CSN = “L”.
n Register Map
MS0054-E-01
Addr
00H
01H
02H
03H
All registers are reset at PDN = “L”, then inhibits writing to all registers.
Input Select
Mode Control 1
Mode Control 2
Input Analog PGA Control
Register Name
CSN
CCLK
CDTI
op0-op2: Op code (Fixed to “**1:WRITE”)
A0-A4:
D0-D7:
op0 op1
“*”
0
“*”
1
MONO1
ZEIP
op2
“1”
D7
2
0
0
Register Address
Control data
A0
3
Figure 9. Control Data Timing
A1
MONO0
4
IPGA6
D6
0
0
A2
5
A3 A4
6
- 11 -
IPGA5
ZTM1
7
D5
0
0
D0 D1 D2 D3 D4 D5 D6 D7
8
9
IPGA4
ZTM0
HPF
D4
10 11 12 13 14 15
0
IPGA3
RIN2
D3
0
0
IPGA2
RIN1
D2
0
0
IPGA1
LIN2
PM1
DIF
D1
[AK5354]
2001/01
IPGA0
LIN1
PM0
D0
0