AK5356VN Asahi Kasei Microsystems, AK5356VN Datasheet - Page 17

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AK5356VN

Manufacturer Part Number
AK5356VN
Description
LOW POWER 20BIT ADC WITH MIC AMP & PGA
Manufacturer
Asahi Kasei Microsystems
Datasheet

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ASAHI KASEI
n Register Map
All registers are reset at PDN = “L”, then inhibits writing to all registers.
For address from 04H to 1FH, data must not be written.
Unused bits must contain a “0” value.
n Register Definition
Input Select
Power Management Control
MS0171-E-00
Addr
Addr
Addr
00H
01H
02H
03H
00H
01H
PREG1-0: Select gain of Pre-Amp
PMADC: Power Management of IPGA and ADC
PMMIC: Power Management of MIC Block (Pre-Amp, MIC Power and MVCM)
When PDN pin goes “L”, all circuit in the AK5356 can be powered-down in no relation to PMADC and PMMIC bits.
When PMADC and PMMIC bits go “0”, all circuit in the AK5356 can be also powered-down. However, the contents
of control registers are held.
Except the case of PMADC=PMMIC= “0” or PDN pin = “L”, MCLK, BCLK and LRCK should not be stopped.
HPF:
R
MICR:
LIN:
MICL:
IN:
Input Select
Power Management Control
Mode Control
IPGA Control
Register Name
Input Select
Register Name
Power Management Control
Default
00: +13dB
01: +18dB
10: +28dB (Default)
11: +33dB
Pre-Amp gain value of L/R channels change by zero crossing detection or timeout independently. Timeout
cycle is fixed to 2048/fs (=46.8ms @ fs = 44.1kHz). Zero crossing detection is done by IPGA block. When
PMADC bit is “0”, gain of Pre-Amp changes immediately.
Default
0: Power OFF
1: Power ON (Default)
0: Power OFF
1: Power ON (Default)
Register Name
Select ON/OFF of the digital HPF (0: ON, 1: OFF)
Select ON/OFF of Rch LINE input (0: OFF, 1: ON)
Select ON/OFF of Rch MIC input (0: OFF, 1: ON)
Select ON/OFF of Lch LINE input (0: OFF, 1: ON)
Select ON/OFF of Lch MIC input (0: OFF, 1: ON)
MONO1
ZEIP
D7
D7
D7
0
0
0
0
0
0
MONO0
PREG1
PREG1
IPGA6
D6
D6
D6
0
0
0
1
- 17 -
PREG0
PREG0
IPGA5
ZTM1
D5
D5
D5
0
0
0
0
IPGA4
ZTM0
HPF
HPF
D4
D4
D4
0
0
0
0
IPGA3
RIN
RIN
D3
D3
D3
0
0
0
0
0
IPGA2
MICR
MICR
D2
D2
D2
0
0
1
0
0
PMADC
PMADC
IPGA1
LIN
DIF
LIN
D1
D1
D1
0
1
[AK5356]
PMMIC
PMMIC
2002/08
IPGA0
MICL
MICL
D0
D0
D0
0
1
1

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