SP3222 Sipex, SP3222 Datasheet - Page 10

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SP3222

Manufacturer Part Number
SP3222
Description
True +3.0V to +5.5V RS-232 Transceivers
Manufacturer
Sipex
Datasheet

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Receivers
The receivers convert EIA/TIA-232 levels to
TTL or CMOS logic output levels. All receivers
have an inverting tri-state output. These receiver
outputs (RxOUT) are tri-stated when the enable
control EN = HIGH. In the shutdown mode, the
receivers can be active or inactive. EN has no
effect on TxOUT. The truth table logic of the
SP3222/3232E driver and receiver outputs can
be found in Table 2.
Since receiver input is usually from a transmis-
sion line where long cable lengths and system
interference can degrade the signal, the inputs
have a typical hysteresis margin of 300mV. This
ensures that the receiver is virtually immune to
noisy transmission lines. Should an input be left
unconnected, a 5kΩ pulldown resistor to ground
will commit the output of the receiver to a HIGH
state.
Charge Pump
The charge pump is a Sipex–patented design
(5,306,954) and uses a unique approach com-
pared to older less–efficient designs. The charge
pump still requires four external capacitors, but
uses a four–phase voltage shifting technique to
attain symmetrical 5.5V power supplies. The
internal power supply consists of a regulated
dual charge pump that provides output voltages
5.5V regardless of the input voltage (V
the +3.0V to +5.5V range.
Rev. 07/01/03
Table 2. Truth Table Logic for Shutdown and Enable
Control
S
H
0
0
1
1
D
N
E
0
1
0
1
N
SP3222/3232E True +3.0 to +5.0V RS-232 Transceivers
T
T
T
A
A
i r
i r
x
c
c
s -
s -
O
v i t
v i t
a t
a t
U
e
e
e t
e t
T
T
T
R
A
A
i r
i r
x
c
c
s -
s -
CC
O
v i t
v i t
) over
a t
a t
U
e
e
e t
e t
T
10
In most circumstances, decoupling the power
supply can be achieved adequately using a 0.1µF
bypass capacitor at C5 (refer to Figures 6 and 7).
In applications that are sensitive to power-sup-
ply noise, decouple V
tor of the same value as charge-pump capacitor
C1. Physically connect bypass capacitors as
close to the IC as possible.
The charge pumps operate in a discontinuous
mode using an internal oscillator. If the output
voltages are less than a magnitude of 5.5V, the
charge pumps are enabled. If the output voltage
exceed a magnitude of 5.5V, the charge pumps
are disabled. This oscillator controls the four
phases of the voltage shifting. A description of
each phase follows.
Phase 1
— V
the clock cycle, the positive side of capacitors C
and C
switched to GND and the charge in C
ferred to C
voltage potential across capacitor C
times V
Phase 2
— V
nects the negative terminal of C
storage capacitor and the positive terminal of C
to GND. This transfers a negative generated
voltage to C
lated to a minimum voltage of -5.5V. Simulta-
neous with the transfer of the voltage to C
positive side of capacitor C
and the negative side is connected to GND.
Phase 3
— V
clock is identical to the first phase — the charge
transferred in C
terminal of C
side of capacitor C
voltage potential across C
DD
SS
SS
2
transfer — Phase two of the clock con-
charge storage — During this phase of
are initially charged to V
charge storage — The third phase of the
CC
.
2
. Since C
3
. This generated voltage is regu-
1
, which is applied to the negative
1
produces –V
2
. Since C
CC
2
+
© Copyright 2003 Sipex Corporation
to ground with a capaci-
is connected to V
2
1
is 2 times V
is switched to V
CC
2
+
in the negative
CC
is at V
2
. C
to the V
2
1
is now 2
l
+
is trans-
CC
is then
CC
CC
.
3
, the
, the
, the
CC
SS
1
2

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