GAL20RA10B-10LJ Lattice Semiconductor, GAL20RA10B-10LJ Datasheet - Page 9

• Manufacturer Part Number: GAL20RA10B-10LJ
• Description: High-Speed Asynchronous E2CMOS PLD Generic Array Logic
• Manufacturer: Lattice Semiconductor

3-state levels are measured 0.5V from steady-state active
level.
Output Load Conditions (see figure)
f
Switching Test Conditions
Input Pulse Levels
Input Rise and
Fall Times
Input Timing Reference Levels
Output Timing Reference Levels
Output Load
max Descriptions
Test Condition
A
B
C
Active High
Active Low
Active High
Active Low
f
max with External Feedback 1/(
Note: fmax with external feedback is cal-
culated from measured tsu and tco.
LOGIC
ARRAY
t
su
-15/-20/-30
470
470
470
R
-7/-10
1
REGISTER
CLK
390
390
390
390
390
R
2ns 10% – 90%
3ns 10% – 90%
2
t
GND to 3.0V
t
See Figure
su+
co
1.5V
1.5V
t
co)
50pF
50pF
50pF
5pF
5pF
C
L
9
FROM OUTPUT (O/Q)
UNDER TEST
Specifications GAL20RA10
*C
L
Note: fmax with no feedback may be less
than 1/(twh + twl). This is to allow for a
clock duty cycle of other than 50%.
INCLUDES TEST FIXTURE AND PROBE CAPACITANCE
LOGIC
ARRAY
f
max with No Feedback
R
2
+5V
REGISTER
R
1
CLK
C *
L
TEST POINT