HN58X24128FPI Hitachi Semiconductor, HN58X24128FPI Datasheet
HN58X24128FPI
Related parts for HN58X24128FPI
HN58X24128FPI Summary of contents
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HN58X24128I/HN58X24256I 128k EEPROM (16-kword 8-bit) 256k EEPROM (32-kword 8-bit) Description HN58X24xxx series are two-wire serial interface EEPROM (Electrically Erasable and Programmable ROM). They realize high speed, low power consumption and a high level of reliability by employing advanced MNOS memory ...
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... Shipping tape and reel TSSOP 14-pin: 2,000 IC/reel SOP 8-pin: 2,500 IC/reel Temperature range: – Note trademark of Philips Corporation. Ordering Information Type No. Internal organization Operating voltage HN58X24128FPI 128k bit (16384 8-bit) HN58X24256FPI 256k bit (32768 8-bit) HN58X24128TI 128k bit ...
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Pin Description Pin name Function Device address SCL Serial clock input SDA Serial data input/output WP Write protect V Power supply CC V Ground connection Block Diagram A0, A1, ...
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HN58X24128I/HN58X24256I DC Operating Conditions Parameter Supply voltage Input high voltage Input low voltage Operating temperature Notes (min): –1.0 V for pulse width IL DC Characteristics (Ta = –40 to +85˚C, V Parameter Symbol Input leakage current I LI ...
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AC Characteristics (Ta = –40 to +85˚C, V Test Conditions Input pules levels 0 0 Input rise and fall time Input and output timing reference levels: 0.5 V ...
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HN58X24128I/HN58X24256I Timing Waveforms Bus Timing t F SCL t SU.STA t HD.STA SDA (in) t SDA (out) Write Cycle Timing SCL D0 in SDA Write data (Address (n)) 6 1/f SCL t t LOW HIGH t HD.DAT ...
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Pin Function Serial Clock (SCL) The SCL pin is used to control serial input/output data timing. The SCL input is used to positive edge clock data into EEPROM device and negative edge clock data out of each device. Maximum clock ...
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HN58X24128I/HN58X24256I Device Address (A0, A1, A2) Eight devices can be wired for one common data bus line as maximum. Device address pins are used to distinguish each device and device address pins should be connected to V code provided from ...
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Functional Description Start Condition A high-to-low transition of the SDA with the SCL high is needed in order to start read, write operation. (See start condition and stop condition) Stop Condition A low-to-high transition of the SDA with the SCL ...
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HN58X24128I/HN58X24256I Acknowledge All addresses and data words are serially transmitted to and from in 8-bit words. The receiver sends a zero to acknowledge that it has received each word. This happens during ninth clock cycle. The transmitter keeps bus open ...
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Device Addressing The EEPROM device requires an 8-bit device address word following a start condition to enable the chip for a read or a write operation. The device address word consists of 4-bit device code, 3-bit device address code and ...
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HN58X24128I/HN58X24256I Write Operations Byte Write: A write operation requires an 8-bit device address word with R/W = “0”. Then the EEPROM sends acknowledgment "0" at the ninth clock cycle. After these, the 128kbit and 256kbit EEPROMs receive 2 sequence 8-bit ...
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Page Write: The EEPROM is capable of the page write operation which allows any number of bytes bytes to be written in a single write cycle. The page write is the same sequence as the byte write ...
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HN58X24128I/HN58X24256I Acknowledge Polling: Acknowledge polling feature is used to show if the EEPROM internally-timed write cycle or not. This features is initiated by the stop condition after inputting write data. This requires the 8-bit device address word ...
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Read Operation There are three read operations: current address read, random read, and sequential read. Read operations are initiated the same way as write operations with the exception of R/W = “1”. Current Address Read: The internal address counter maintains ...
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HN58X24128I/HN58X24256I Random Read: This is a read operation with defined read address. A random read requires a dummy write to set read address. The EEPROM receives a start condition, device address word (R/W=0) and memory address 2 8-bit sequentially. The ...
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Sequential Read: Sequential reads are initiated by either a current address read or a random read. If the EEPROM receives acknowledgment “0” after 8-bit read data, the read address is incremented and the next 8-bit read data are coming out. ...
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HN58X24128I/HN58X24256I Notes Data Protection at V On/Off CC When V is turned on or off, noise on the SCL and SDA inputs generated by external circuits (CPU, etc) CC may act as a trigger and turn the EEPROM to unintentional ...
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... Package Dimensions HN58X24128FPI/HN58X24256FPI (FP-8DB) 5.15 Max 8 1 1.27 +0.063 *0.42 –0.064 0.40 0.06 *Dimension including the plating thickness Base material dimension 4. 0.69 Max 0.60 0.10 0.25 M Hitachi Code JEDEC EIAJ Weight (reference value) HN58X24128I/HN58X24256I 6.02 0.18 1.06 0 – 0.289 – 0.194 FP-8DB — — 0.08 g Unit ...
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HN58X24128I/HN58X24256I HN58X24128TI/HN58X24256TI (TTP-14D) 5.00 5.30 Max 14 1 +0.08 *0.22 –0.07 0.20 0.06 0.83 Max *Dimension including the plating thickness Base material dimension 0.65 0.13 M 6.40 0.20 0.10 Hitachi Code JEDEC EIAJ Weight (reference value) 1.0 ...
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... This product is not designed to be radiation resistant one is permitted to reproduce or duplicate, in any form, the whole or part of this document without written approval from Hitachi. 7. Contact Hitachi’s sales office for any questions regarding this document or Hitachi semiconductor products. Hitachi, Ltd. Semiconductor & Integrated Circuits. ...
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HN58X24128I/HN58X24256I Revision Record Rev. Date Contents of Modification 1.0 Apr. 2, 1999 Initial issue 2.0 Nov. 26, 1999 Addition of Note Features Addition of contents for “Shipping tape and reel” 22 Drawn by Approved by T. Okada M. Terasawa ...