ISPLSI5256VA-125LB208 Lattice Semiconductor, ISPLSI5256VA-125LB208 Datasheet - Page 11

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ISPLSI5256VA-125LB208

Manufacturer Part Number
ISPLSI5256VA-125LB208
Description
In-System Programmable 3.3V SuperWIDE High Density PLD
Manufacturer
Lattice Semiconductor
Datasheet
1. I/O voltage configuration must be set to VCC.
Output Load Conditions (See Figure 8)
3-state levels are measured 0.5V from steady-state
active level.
Switching Test Conditions
DC Electrical Characteristics for 3.3V Range
V
V
V
V
V
C
SYMBOL
A
B
D
Input Pulse Levels
Input Rise and Fall Time
Input Timing Reference Levels
Ouput Timing Reference Levels
Output Load
TEST CONDITION
CCIO
IL
IH
OL
OH
Active High
Active Low
Active High to Z
at V -0.5V
Active Low to Z
at V +0.5V
Slow Slew
OH
OL
I/O Reference Voltage
Input Low Voltage
Input High Voltage
Output Low Voltage
Output High Voltage
316
316
316
R1
PARAMETER
3.3V
348
348
348
R2
Over Recommended Operating Conditions
511
511
511
GND to V
R1
1.5ns 10% to 90%
See figure
2.5V
1.5V
1.5V
Table 2 - 0004A/5384
475
475
475
Table 2 - 0003/5384
R2
CCIO min
35pF
35pF
35pF
35pF
5pF
5pF
CL
V
V
I
I
OL
OH
OH
OH
= 8 mA
= -4 mA
11
1
V
V
Figure 9. Test Load
*
Device
Output
OUT
OUT
Specifications ispLSI 5256VA
CONDITION
C L includes Test Fixture and Probe Capacitance.
or V
or V
OUT
OUT
V
V
OL (max)
OL
(max)
V
CCIO
MIN.
R 1
R 2
-0.3
3.0
2.0
2.4
TYP.
C L
*
MAX. UNITS
5.25
Table 2-0007/5256VA
3.6
0.8
0.4
Point
Test
0213D
V
V
V
V
V

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