AM7968-125DKC Advanced Micro Devices, AM7968-125DKC Datasheet - Page 86

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AM7968-125DKC

Manufacturer Part Number
AM7968-125DKC
Description
TAXIchip Integrated Circuits(Transparent Asynchronous Xmitter-Receiver Interface)
Manufacturer
Advanced Micro Devices
Datasheet
Figure 7-7
82
AMD
Receiver Timing in Auto-Repeat Configuration
When IGM1 goes high, CNB2 goes high. This allows RX2 to decode the next byte and
raise it’s IGM. IGM2 is connected to CNB3 and RX3 is now allowed to decode the next
byte and raise its IGM.
In Figure 7-8 since IGM3 = CNB1, CNB1 goes LOW.
When CNB1 goes LOW, RX1 is reset and it pulls it’s IGM LOW (t
Since IGM1 is connected to CNB2, RX2 is reset and pulls its IGM LOW t
CNB3 = IGM2 goes LOW, which causes IGM3 to follow it LOW t
LOW makes CNB1 go HIGH again and RX1 is now set to receive the next byte of data
on the SERIN.
See Figure 7-9. Thus, the cycle starts over again.
Note:
Only when a Receiver has a CNB = 1, can it accept new data. It then raises its IGM when it sees a non-Sync
byte. It won’t accept another data byte until it’s CNB has gone LOW and HIGH again.
IGM3 =
CNB1
CNB1
CNB2
CNB3
Serial
IGM1
IGM2
Data
TAXIchip Integrated Circuits Technical Manual
Sync
Data 1
Data 2
Data 3
46
46
ns later. IGM3 going
ns).
46
12330E-29
ns later.

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