K4D263238A Samsung, K4D263238A Datasheet - Page 12
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K4D263238A
Manufacturer Part Number
K4D263238A
Description
1M x 32Bit x 4 Banks Double Data Rate Synchronous DRAM with Bi-directional Data Strobe and DLL
Manufacturer
Samsung
Datasheet
1.K4D263238A.pdf
(17 pages)
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Note :
AC OPERATING TEST CONDITIONS
CAPACITANCE
DECOUPLING CAPACITANCE GUIDE LINE
Recommended decoupling capacitance added to power line at board.
Decoupling Capacitance between V
Decoupling Capacitance between V
Input reference voltage for CK(for single ended)
CK and CK signal maximum peak swing
CK signal minimum slew rate
Input Levels(V
Input timing measurement reference level
Output timing measurement reference level
Output load condition
Input capacitance( CK, CK )
Input capacitance(A
Input capacitance
( CKE, CS, RAS,CAS, WE )
Data & DQS input/output capacitance(DQ
Input capacitance(DM0 ~ DM3)
1. V
2. V
All V
All V
DD
SS
Parameter
and V
and V
DD
SS
pins are connected in chip. All V
pins are connected in chip. All V
IH
SSQ
DDQ
/V
0
Parameter
IL
~A
pins are separated each other
Parameter
pins are separated each other.
)
(V
11
DD
, BA
Output
=2.5V, T
0
~BA
DD
DDQ
1
)
and V
A
and V
= 25°C, f=1MHz)
0
~DQ
SS
SSQ
SSQ
DDQ
31
)
pins are connected in chip.
pins are connected in chip.
(Fig. 1) Output Load Circuit
(V
Z0=50Ω
DD
- 12 -
=2.5V±5%, T
Symbol
C
LOAD
C
C
C
C
C
OUT
IN1
IN2
IN3
IN4
V
REF
=30pF
Symbol
C
C
+0.35/V
0.50*V
See Fig.1
DC1
DC2
Value
V
A
V
1.5
1.0
V
= 0 to 65°C)
REF
tt
tt
=0.5*V
DDQ
R
REF
T
=50Ω
Min
1.0
1.0
1.0
1.0
1.0
-0.35
DDQ
V
=0.5*V
REF
0.1 + 0.01
0.1 + 0.01
Value
DDQ
128M DDR SDRAM
Max
5.0
4.0
4.0
6.5
6.5
Rev. 2.0 (Jan. 2003)
Unit
V/ns
V
V
V
V
V
Unit
uF
uF
Unit
pF
pF
pF
pF
pF
Note