SAA5281GP Philips Semiconductors, SAA5281GP Datasheet - Page 18

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SAA5281GP

Manufacturer Part Number
SAA5281GP
Description
Integrated Video input processor and Teletext decoder IVT1.8
Manufacturer
Philips Semiconductors
Datasheet

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Philips Semiconductors
Extension packet memory organization
When in normal extension packet enabled mode the rows of information are organized as illustrated in Fig.10.
Row 23 of the extension page, as shown in Fig.10, contains packet 8/30. Packet 8/30 is mapped into the IVT1.8* memory
as follows:
1996 Nov 04
handbook, full pagewidth
8 / 30 / 0 and 8 / 30 / 1 to Chapter 4 Row 23
8 / 30 / 2 and 8 / 30 / 3 to Chapter 5 Row 23
8 / 30 / 4 to 8 / 30 / 15 to Chapter 6 Row 23.
Integrated Video input processor and
Teletext decoder (IVT1.8*)
(1) Row 25 reserved for VPS data in Chapter 5.
Fig.10 Organization of the extension memory.
PACKET
PACKETS X/26/0 to X/26/14
PACKETS X/27/0 to X/27/1
PACKETS X/27/4 to X/27/5
PACKET
PACKET
PACKET
RESERVED
PACKET
PACKET
X/24 IF R0D7 = 0
18
X/28/2
X/28/0
X/28/1
X/25
8/30
(1)
MBD791
ROW
14
to
15
16
17
18
19
20
21
22
23
24
25
0
Preliminary specification
SAA5281

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