RGR1551-ST Agilent(Hewlett-Packard), RGR1551-ST Datasheet - Page 2

• Manufacturer Part Number: RGR1551-ST
• Description: Fiber Optic Light to Logic Receiver with Clock Recovery
• Manufacturer: Agilent(Hewlett-Packard)

Connection Diagram
Top View
Pin Descriptions
Pins 1, 2, 3, 6, 8, 13, 15, 16,
GND:
These pins should be connected
to the circuit ground.
Pins 4, 5, CLOCK, CLOCK:
These pins provide complemen-
tary differential PECL CLOCK
and CLOCK outputs.
Pins 7, 9, DATA, DATA:
These pins provide complemen-
tary differential PECL DATA and
DATA outputs.
The RGR1551 DATA output is
noninverting, an optical pulse
PD BIAS
CLOCK
CLOCK
DATA
DATA
GND
GND
GND
GND
GND
1
2
3
4
5
6
7
8
9
10
FIBER PIGTAIL
causes the DATA output to go to
the PECL logic high state (+4 V
nominal).
Pin 10, PD Bias:
This pin must be connected to
any voltage between 0 V (GND)
and –5 V. This provides the photo-
diode bias. The current drawn is
directly proportional to the
average received photocurrent.
I = Responsivity x Mean Power.
The Responsivity will be between
0.7 A/W and 1.0 A/W.
Pin 11, +5 V:
This pin should be connected to
+5 V supply. The network shown
below should be placed as close
as possible to pin 11.
20
19
18
17
16
15
14
13
12
11
PIN 11
10 µF
NC
NC
NC
NC
GND
GND
ALARM
GND
ALARM
+5 V
100 nF
1 µH
100 nF
+5 V
Pins 12, 14, ALARM, ALARM:
These pins provide complemen-
tary ALARM and ALARM outputs.
This is the low light alarm.
ALARM goes to a logic low
(CMOS compatible) state when
the optical power drops below
the threshold level (insufficient
optical power).
The optical power must increase
to a higher level than the level
where the alarm went low before
ALARM will return to a logic
high. This difference is the alarm
hysteresis.
Pins 17, 18, 19, 20, NC:
These pins are not connected and
should be left open circuit on the
application PCB.
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