54ABT16646W-QML National Semiconductor, 54ABT16646W-QML Datasheet - Page 5
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54ABT16646W-QML
Manufacturer Part Number
54ABT16646W-QML
Description
16-Bit Transceivers and Registers with TRI-STATE Outputs
Manufacturer
National Semiconductor
Datasheet
1.54ABT16646W-QML.pdf
(10 pages)
PrintDate=1998/07/14 PrintTime=11:10:43 43606 ds100226 Rev. No. 1 cmserv
V
V
V
V
V
V
I
I
I
I
I
I
I
I
I
I
I
I
I
I
IH
BVI
BVIT
IL
IH
IL
OS
CEX
ZZ
CCH
CCL
CCZ
CCT
CCD
Symbol
IH
IL
CD
OH
OL
ID
DC Electrical Characteristics
Absolute Maximum Ratings
Storage Temperature
Ambient Temperature under Bias
Junction Temperature under Bias
V
Input Voltage (Note 3)
Input Current (Note 3)
Voltage Applied to Any Output
Current Applied to Output
DC Latchup Source Current
+ I
+ I
CC
Ceramic
Ground Pin
in the Disable or
Power-Off State
in the HIGH State
in LOW State (Max)
OZL
OZH
Pin Potential to
Input HIGH Voltage
Input LOW Voltage
Input Clamp Diode Voltage
Output HIGH Voltage
Output LOW Voltage
Input Leakage Test
Input HIGH Current
Input HIGH Current
Breakdown Test
Input HIGH Current
Breakdown Test (I/O)
Input LOW Current
Output Leakage Current
Output Leakage Current
Output Short-Circuit Current
Output HIGH Leakage Current
Bus Drainage Test
Power Supply Current
Power Supply Current
Power Supply Current
Additional I
Dynamic I
(Note 5)
CC
CC
Parameter
/Input
54ABT
54ABT
54ABT
twice the rated I
No Load
−30 mA to +5.0 mA
−65˚C to +150˚C
−55˚C to +125˚C
−55˚C to +175˚C
−0.5V to +7.0V
−0.5V to +7.0V
−0.5V to +5.5V
−0.5V to V
(Note 2)
−100
4.75
Min
2.0
2.5
2.0
−500 mA
OL
ABT16646
(mA)
Typ
CC
5
−275
Max
−1.2
0.55
0.23
100
−50
100
0.8
2.0
2.0
2.5
−5
50
50
60
5
7
Over Voltage Latchup (I/O)
Recommended Operating
Conditions
Free Air Ambient Temperature
Supply Voltage
Minimum Input Edge Rate
Note 2: Absolute maximum ratings are values beyond which the device may
be damaged or have its useful life impaired. Functional operation under these
conditions is not implied.
Note 3: Either voltage limit or current limit is sufficient to protect inputs.
Military
Military
Data Input
Enable Input
Clock Input
mA/MHz
Units
mA
mA
mA
mA
mA
µA
µA
µA
µA
µA
µA
µA
µA
V
V
V
V
V
0V–5.5V
0V–5.5V
0.0V
Max
Max
Max
Max
Max
Max
Max
Max
Max
Max
Max
V
Min
Min
0.0
CC
Proof
I
Recognized HIGH Signal
Recognized LOW Signal
I
I
I
I
All Other Pins Grounded
V
V
V
V
V
V
V
V
V
V
V
All Others GND
All Outputs HIGH
All Outputs LOW
Outputs TRI-STATE; All Others
GND
V
All Other Outputs at V
Outputs Open
OE, DIR, and SEL = GND,
Non-I/O = GND or V
One Bit toggling, 50% duty cycle
IN
OH
OH
OL
ID
IN
IN
IN
IN
IN
IN
OUT
OUT
OUT
OUT
OUT
I
= V
= −18 mA (Non I/O Pins)
= 1.9 µA, (Non-I/O Pins)
= 48 mA, (A
= −3 mA, (A
= −24 mA, (A
= 2.7V (Non-I/O Pins) (Note 5)
= V
= 7.0V (Non-I/O Pins)
= 5.5V (A
= 0.5V (Non-I/O Pins) (Note 5)
= 0.0V (Non-I/O Pins)
= 2.7V (A
= 0.5V (A
= 0V (A
= V
= 5.5V (A
CC
CC
CC
− 2.1V
(Non-I/O Pins)
Conditions
(A
n
n
, B
, B
n
n
n
n
n
, B
n
, B
, B
, B
, B
, B
−55˚C to +125˚C
n
n
n
)
, B
)
n
+4.5V to +5.5V
n
n
n
n
)
n
); OE = 2.0V
); OE = 2.0V
);
CC
)
)
n
www.national.com
CC
)
100 mV/ns
(Note 4)
50 mV/ns
20 mV/ns
or GND
( V/ t)
10V
5