AME8510 Analog Microelectronics, AME8510 Datasheet - Page 9

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AME8510

Manufacturer Part Number
AME8510
Description
Micropower uP Watch Dog Timer
Manufacturer
Analog Microelectronics
Datasheet

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AME8510 / 8520 / 8530
n Detailed Description
the reset input of a microprocessor and to prevent CPU
execution errors due to power up, power down, and other
power supply errors. The AME8510/8520 also monitor
the CPU health by checking for signal transitions from
the CPU at the WDI input.
Reset Output
either push/pull or open drain. In addition each output
may be either active high or active low with the condition
that parts with two outputs must have opposite polari-
ties. Active high reset outputs are denoted as RESET.
Active low reset outputs are denoted as RESETB. The
selection guide on page 3 of this data sheet shows all
possible combinations of output driver configuration.
interval after:
V
RESETB
RESET
The AME8510/8520/8530 are designed to interface with
Each output pin in the family can be configured to be
A reset will be asserted if any of three things happen:
The reset will remain asserted for the prescribed reset
DD
1) V
2) The MRB pin is pulled low.
3) The WDI pin does not detect a transition
1) V
2) MRB goes high
3) The watch dog timer has timed out causing
within the watch dog interval (T
V
the reset to assert.
Release
DD
DD
AME, Inc.
rises above the threshold (V
Reset Timing Diagram
drops below the threshold (V
T
T
D2
D2
50%
50%
T
T
D1
D1
WD
TH
TH
).
)
)
50%
V
50%
TH
Manual Reset Input
feature (MRB). A logic low on the MRB pin asserts a
reset. The reset remains asserted as long as the MRB
pin remains low. After the MRB pin transitions to a high
state the reset remains asserted for the prescribed reset
interval (T
by a 100K resistor. It is internally debounced to reject
switching transients.
to V
higher than V
Watchdog Input
dog input (WDI). If the microprocessor does not produce
a valid logic edge at the the watchdog input (WDI) within
the prescribed watchdog interval (T
serts. The reset remains asserted for the required reset
interval (T
deasserted and the watchdog interval timer starts again
from zero.
nected to a tri-stated buffer the watchdog function is dis-
abled. As soon as the WDI input is driven either low or
high the watchdog function resumes with the watchdog
timer set to zero.
RESETB
VDD
WDI
The AME8510 and AME8530 feature a manual reset
The MRB pin is ESD protected by diodes connected
The AME8510 and AME8520 are equipped with a watch-
If the watchdog input is left unconnected or is con-
DD
and GND. So the MRB pin should never be driven
D2
D2
V
). The MRB pin is internally pulled up to VDD
TH
) At the end of the reset interval the reset is
T
Micropower P Watch Dog Timer
Watchdog Timing Diagram
DD
D2
or lower than GND.
T
WD
WD
) then a reset as-
T
D2
9

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