ADV476KN35 Analog Devices, ADV476KN35 Datasheet - Page 3

• Manufacturer Part Number: ADV476KN35
• Description: CMOS Monolithic 256x18 Color Palette RAM-DAC
• Manufacturer: Analog Devices

REV. B
TIMING CHARACTERISTICS
Parameter
f
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
NOTES
1
2
3
Specifications subject to change without notice.
MAX
TTL input values are 0 to 3 volts, with input rise/fall times 3 ns, measured between the 10% and 90% points. Timing reference points at 50% for inputs and
Temperature Range (T
Settling time does not include clock and data feedthrough. For this test, the digital inputs have a 1 k
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
PD
outputs. Analog output load 10 pF, 37.5 . D0–D7 output load 50 pF. See timing notes in Figure 2.
3
66 MHz Version
66
10
10
5
40
20
10
10
50
4 t
3
3
15.3
5
5
30
5
6
15.3
2
4
MIN
12
to T
MAX
); 0 to +70 C
50 MHz Version
50
10
10
5
40
20
10
10
50
4 t
3
3
20
6
6
30
5
8
20
2
4
1
(V
12
CC
Figure 2. Video Input/Output Timing
= +5 V
Figure 1. MPU Read/Write Timing
10%. All Specifications T
35 MHz Version
35
15
15
5
40
20
15
15
50
4 t
4
4
28
7
9
30
5
8
25
2
4
12
–3–
MIN
resistor to ground and are driven by 74HC logic.
Units
MHz
ns min
ns min
ns min
ns max
ns max
ns min
ns min
ns min
ns min
ns min
ns min
ns min
ns min
ns min
ns max
ns min
ns max
ns typ
ns min
clocks
to T
MAX
2
)
Conditions/Comments
Clock Rate
RS0, RS1 Setup Time
RS0, RS1 Hold Time
RD Asserted to Data Bus Driven
RD Asserted to Data Valid
RD Negated to Data Bus 3-Stated
Write Data Setup Time
Write Data Hold Time
RD, WR Pulse Width Low
RD, WR Pulse Width High
Pixel & Control Setup Time
Pixel & Control Hold Time
Clock Cycle Time
Clock Pulse Width High Time
Clock Pulse Width Low Time
Analog Output Delay
Analog Output Rise/Fall Time
Analog Output Settling Time
Analog Output Skew
Pipeline Delay
ADV476