GS71208TP-8 GSI [GSI Technology], GS71208TP-8 Datasheet - Page 5

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GS71208TP-8

Manufacturer Part Number
GS71208TP-8
Description
128K x 8 1Mb Asynchronous SRAM
Manufacturer
GSI [GSI Technology]
Datasheet
AC Test Conditions
AC Characteristics
Read Cycle
* These parameters are sampled and are not 100% tested
Rev: 1.03 10/2001
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Note:
1.
2.
3.
Include scope and jig capacitance.
Test conditions as specified with output loading as shown in Fig. 1
unless otherwise noted.
Output load 2 for t
Output reference level
Input reference level
Input high level
Input low level
Input rise time
Parameter
Input fall time
Output load
Output disable to output in High Z (OE)
Output enable to output in low Z (OE)
Chip disable to output in High Z (CE)
Chip enable to output in low Z (CE)
Output enable to output valid (OE)
Output hold from address change
LZ
Chip enable access time (CE)
, t
HZ
, t
Address access time
OLZ
Read cycle time
Parameter
and t
OHZ
Conditions
V
V
tr = 1 V/ns
tf = 1 V/ns
Fig. 1& 2
IH
IL
1.4 V
1.4 V
= 0.4 V
= 2.4 V
5/11
Symbol
t
t
t
OHZ
t
t
t
t
OLZ
t
t
LZ
HZ
RC
OE
OH
AA
AC
*
*
DQ
*
*
DQ
Output Load 1
Output Load 2
Min
8
3
3
0
© 1999, Giga Semiconductor, Inc.
5pF
VT = 1.4 V
-8
1
3.3 V
Max
50
3.5
3.5
8
8
4
589
434
GS71208TP
30pF
1
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns

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