AS7C256A-10JC ALSC [Alliance Semiconductor Corporation], AS7C256A-10JC Datasheet - Page 4
AS7C256A-10JC
Manufacturer Part Number
AS7C256A-10JC
Description
5V 32K X 8 CMOS SRAM (Common I/O)
Manufacturer
ALSC [Alliance Semiconductor Corporation]
Datasheet
1.AS7C256A-10JC.pdf
(9 pages)
9/24/04; v.1.2
Read cycle (over the operating range)
Key to switching waveforms
Read waveform 1 (address controlled)
Read waveform 2 (CE controlled)
Read cycle time
Address access time
Chip enable (CE) access time
Output enable (OE) access time
Output hold from address change
CE LOW to output in low Z
CE HIGH to output in high Z
OE LOW to output in low Z
OE HIGH to output in high Z
Power up time
Power down time
Address
current
Supply
D
D
OE
CE
out
out
Parameter
Rising input
t
t
PU
CLZ
t
ACE
Symbol
t
t
t
t
t
t
t
t
t
t
t
RC
AA
ACE
OE
OH
CLZ
CHZ
OLZ
OHZ
PU
PD
t
OE
t
50%
Alliance Semiconductor
AA
t
OLZ
2,5,7,8
t
RC
t
1
2,8
Min
RC
Falling input
2,5,6,8
10
–
–
–
3
3
–
0
–
0
–
-10
Max
10
10
10
–
5
–
–
3
–
3
–
Data valid
Min
12
Data valid
–
–
–
3
3
–
0
–
0
–
®
-12
Max
12
12
12
–
6
–
–
3
–
3
–
t
OH
t
Min
Undefined output/don’t care
PD
15
–
–
–
3
3
–
0
–
0
–
50%
t
t
OHZ
CHZ
-15
Max
15
15
15
–
7
–
–
4
–
4
–
Min
20
–
–
–
3
3
–
0
–
0
–
-20
Max
20
20
20
–
8
–
–
5
–
5
–
P. 4 of 9
AS7C256A
Unit Notes
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
I
I
3,4
3,4
3,4
3,4
3,4
3,4
CC
SB
2
2
4