GS8162Z18B GSI [GSI Technology], GS8162Z18B Datasheet - Page 8

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GS8162Z18B

Manufacturer Part Number
GS8162Z18B
Description
18Mb Pipelined and Flow Through Synchronous NBT SRAM
Manufacturer
GSI [GSI Technology]
Datasheet
Rev: 2.21 11/2004
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
GS8162Z18/36 119-Bump and 165-Bump BGA Pin Description
B
A
Symbol
, B
A
V
TMS
TDO
DQ
DQ
DQ
DQ
CKE
ADV
LBO
TCK
V
V
B
TDI
NC
CK
ZQ
0
An
PE
ZZ
E
E
E
FT
DDQ
W
G
, B
, A
DD
SS
1
3
2
C
D
A
B
1
C
, B
D
Type
I/O
O
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
FLXDrive Output Impedance Control (Low = Low Impedance [High Drive], High = High Impedance [Low
Parity Bit Enable; active low (High = x16/32 Mode, Low = x18/36 Mode)
Byte Write Enable for DQ
8/38
Address field LSBs and Address Counter Preset Inputs
Burst address counter advance enable; active high
Flow Through or Pipeline mode; active low
GS8162Z18(B/D)/GS8162Z36(B/D)/GS8162Z72(C)
Linear Burst Order mode; active low
Sleep mode control; active high
Clock Input Signal; active high
Data Input and Output pins
Output driver power supply
Output Enable; active low
Clock Enable; active low
Write Enable; active low
Chip Enable; active high
Chip Enable; active low
Chip Enable; active low
Scan Test Mode Select
I/O and Core Ground
Scan Test Data Out
Core power supply
Scan Test Data In
Scan Test Clock
Address Inputs
Description
No Connect
A
, DQ
Drive])
B
, DQ
C
, DQ
D
I/Os; active low
© 1999, GSI Technology
BPR1999.05.18

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