LTM4603 LINER [Linear Technology], LTM4603 Datasheet - Page 20

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LTM4603

Manufacturer Part Number
LTM4603
Description
36VIN, 34VOUT High Efficiency Buck-Boost DC/DC
Manufacturer
LINER [Linear Technology]
Datasheet

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applications inForMation
LTM4609
Layout Checklist/Example
The high integration of LTM4609 makes the PCB board
layout very simple and easy. However, to optimize its electri-
cal and thermal performance, some layout considerations
are still necessary.
• Use large PCB copper areas for high current path, includ-
• Place high frequency input and output ceramic capaci-
• Route SENSE
20
ing V
minimize the PCB conduction loss and thermal stress.
tors next to the V
high frequency noise
PC trace spacing. Avoid sense lines passing through
noisy areas, such as switch nodes.
IN
, R
SENSE
and SENSE
, SW1, SW2, PGND and V
IN
, PGND and V
+
leads together with minimum
SW1
V
PGND
OUT
C
OUT
OUT
pins to minimize
(LGA Shown, for BGA Use Circle Pads)
Figure 15. Recommended PCB Layout
OUT
. It helps to
KELVIN CONNECTIONS TO R
+ –
L1
R
SENSE
SGND
SW2
• Place a dedicated power ground layer underneath the
• To minimize the via conduction loss and reduce module
• Do not put vias directly on pads, unless the vias are
• Use a separated SGND ground copper area for com-
Figure 15. gives a good example of the recommended
layout.
unit.
thermal stress, use multiple vias for interconnection
between the top layer and other power layers
capped.
ponents connected to signal pins. Connect the SGND
to PGND underneath the unit.
V
IN
SENSE
R
SENSE
PGND
C
IN
4609 F15
4609fc

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