SH3000EK SEMTECH [Semtech Corporation], SH3000EK Datasheet - Page 3

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SH3000EK

Manufacturer Part Number
SH3000EK
Description
Reset Management and Clock Management Support IC for Microcontrollers
Manufacturer
SEMTECH [Semtech Corporation]
Datasheet
Copyright ©2002-2005 Semtech Corporation
SYSTEM MANAGEMENT
Pin Descriptions
Pin
10
11
12 T
13
14
15
16
1
2
3
4
5
6
7
8
9
CLK
EST
CLK32
Name
IO/I
CLK
N
V
R
RST
V
V
V
V
NC
NC
NC
RST
REG
REF
DD
SS
SS
SS
(V
OUT
NT
IN
SS
)
Digital Out
Digital Out
Digital Out
Digital Out
Digital In
Digital In
Analog
Power
Power
Power
Power
Power
Type
I/O
Ground, 0 V. All V
Output of internal Voltage Regulator, 2.2 V nominal. This pin can power external loads
of <5 mA. If load is “noisy” it requires a bypass capacitor. May be left unconnected or
used as a high logic level signal for CLK
Main power supply, +2.3 to +5.5 V.
Not connected - reserved
Not connected - reserved
Not connected - reserved
Ground, 0 V. All V
Ground, 0 V. All V
Optional 1 MOhm external bias resistor for the internal 32.768 kHz RC oscillator. Can
be used to set, trim or modulate the internal RC oscillator. Keep open if not used.
Active low system reset output. Asserted with a strong low state when a reset condition
occurs. Weakly pulled to V
low as 1 V. Keep open if not used.
Active high system reset output. Asserted with a strong high state when a reset
condition occurs. Weakly pulled to V
for V
Factory test enable. All V
Buffered internal 32.768 kHz clock, derived according to the CLK
uses backup power for the buffer when V
is either at V
signal runs continuously independent of CLK
reduce power consumption during backup operations. When disabled, this pin is driven
to V
Serial communications interface and interrupt output pin. This pin is internally weakly
pulled to the opposite of the programmed interrupt polarity. For example, if interrupt is
programmed to be active low, this pin is weakly pulled to V
open if not used.
Clock activity sense input. Used to detect when the target microcontroller enters stop
mode (which disables its clock). Connect to the microcontroller’s clock output or
oscillator output pin. Connect to V
Programmable high frequency clock output. Connect to the target microcontroller’s clock
input or oscillator input pin. Keep open if not used.
SS
DD
. Keep open if not used.
as low as 1 V. Keep open if not used.
BAK
or V
SS
SS
SS
DD
pins and T
pins and T
pins and T
(if V
SS
DD
DD
3
pins and T
internally when not active. This signal is valid for V
is higher than the reset threshold). When enabled, this
EST
EST
EST
SS
(V
(V
(V
SS
when not used. CLK
SS
SS
SS
Function
EST
SEL
internally when not active. This signal is valid
DD
) pin must be connected together.
) pin must be connected together.
) pin must be connected together.
(V
is not present. When driving high, this signal
OUT
pin (see below).
SS
) pin must be connected together.
activity. Minimize the external load to
SH3002 MicroBuddy™
IN
DD
must not be left open.
when inactive. Keep
V1.20
SEL
pin setting. This pin
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DD
as

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