SH3000UM SEMTECH [Semtech Corporation], SH3000UM Datasheet - Page 13

• Manufacturer Part Number: SH3000UM
• Manufacturer: SEMTECH [Semtech Corporation]

Clock Management System
The SH3003 provides a fl exible tool for creating and man-
aging clocks, a versatile and accurate “any frequency”
clock synthesizer (see Figure 4). It is capable of generat-
ing any frequency in the range of 62.5kHz to 16.0MHz,
with worst-case resolution of 0.0256% (256ppm). The in-
ternal 32.768kHz clock can also be routed to the CLK
pin (and HF oscillator stopped for energy savings).
The objectives, features, and behavior of the Clock Man-
agement System are aimed towards the systems that
utilize a microcontroller, a microprocessor, a DSP or an
ASIC.
The SH3003 permits the automatic sensing of the inten-
tions of the host processor, an industry fi rst. The SH3003
shuts down its clock output when it senses that the host
processor issued a STOP instruction.
Subsequently, the SH3003 idles, consuming less than
10μA. As soon as the host exits the STOP mode, the
SH3003 instantaneously starts to supply a stable clock
(< 2μs wake-up). A typical system, constructed with a ce-
ramic resonator or a crystal as the frequency determining
element, must wait at least several hundred microsec-
©2006 Semtech Corp.
POWER MANAGEMENT
POWER MANAGEMENT
Application Information
32.768 kHz
16
From / To
Serial I/O
2048 Hz
Frequency Locked Loop
Frequency
Set value
(continued)
Logic
13-bit
Figure 4. Simplified HF Oscillator System
FLL On
OUT
13
Random Noise
8-bit Pseudo
onds (for a resonator), or as much as 100ms or more (for
a HF crystal), to re-start the oscillator. The SH3003 allows
the response to and service of an event to fi nish with a
speed previously unattainable for a simple microproces-
sor. A system with a traditional clock approach may be as
much as 100x – 10,000x slower.
Clock Generator Operation
The frequency synthesizer in the SH3003 is constructed
from the 2:1 tunable 8.0 –16.0 MHz HF oscillator followed
by a programmable “power-of-two” post-divider (see Fig-
ure 4).
The Clock Source selector and the programmable post-
scale divider allow instantaneous switching between the
32.768kHz internal clock and divided-down HF oscillator
output. There is no settling or instability when the switch
occurs. This is a preferred method for clock control in
computing systems, when the large ratio between high
and low frequency of operations allows for correspond-
ingly large and instantaneous savings in power consump-
tion.
Generator
8, 16, 32, 64, 128)
(Divide by 1, 2, 4,
DCO Code
Register
18-bit
Post-scaler
Spreading
Clock Source
Spectrum
Controls
1
0
Clock Buffer
HF Digitally
Controlled
8-16 MHz
Oscillator
and Glue
Logic
Clock On
S
TART
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/S
SH3003
CLK
CLK
16
15
DCO On
TOP
Force
OUT
IN