EVAL-AD5383EB AD [Analog Devices], EVAL-AD5383EB Datasheet - Page 16

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EVAL-AD5383EB

Manufacturer Part Number
EVAL-AD5383EB
Description
32-Channel, 3 V/5 V, Single-Supply, 12-Bit, Voltage Output DAC
Manufacturer
AD [Analog Devices]
Datasheet
AD5383
Mnemonic
PD
FIFOEN
DB9 (SPI/I2C)
DB10 (SCLK/SCL)
DB11/(DIN/SDA)
NC
Function
Power Down (Level Sensitive, Active High). PD is used to place the device in low power mode where the device
consumes 2 µA analog supply current and 20 µA digital supply current. In power-down mode, all internal analog
circuitry is placed in low power mode, and the analog output will be configured as a high impedance output or will
provide a 100 kΩ load to ground, depending on how the power-down mode is configured. The serial interface
remains active during power-down.
FIFO Enable (Level Sensitive, Active High). When connected to DVDD, the internal FIFO is enabled, allowing the user
to write to the device at full speed. FIFO is only available in parallel interface mode. The status of the FIFO_EN pin is
sampled on power-up, and also following a CLEAR or RESET, to determine if the FIFO is enabled. In either serial or I
interface modes, the FIFO_EN pin should be tied low.
Multifunction Input Pin. In parallel interface mode, this pin acts as DB9 of the parallel input data-word. In serial
interface mode, this pin acts as serial interface mode select. When serial interface mode is selected (SER/PAR = 1) and
this input is low, SPI mode is selected. In SPI mode, DB12 is the serial clock (SCLK) input and DB11 is the serial data
(DIN) input.
When serial interface mode is selected (SER/PAR = 1) and this input is high I2C Mode is selected.
In this mode, DB12 is the serial clock (SCL) input and DB11 is the serial data (SDA) input.
Multifunction Input Pin. In parallel interface mode, this pin acts as DB10 of the parallel input data-word. In serial
interface mode, this pin acts as a serial clock input.
Serial Interface Mode. In serial interface mode, data is clocked into the shift register on the falling edge of SCLK. This
operates at clock speeds up to 50 MHz.
I
mode is compatible with both 100 kHz and 400 kHz operating modes.
Multifunction Data Input Pin. In parallel interface mode, this pin acts as DB11 of the parallel input data-word.
Serial Interface Mode. In serial interface mode, this pin acts as the serial data input. Data must be valid on the falling
edge of SCLK.
I
No Connect. The user is advised not to connect any signal to these pins.
2
2
C Mode. In I
C Mode. In I
2
2
C mode, this pin performs the SCL function, clocking data into the device. The data transfer rate in I
C mode, this pin is the serial data pin (SDA) operating as an open-drain input/output.
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2
C
2
C

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