EVAL-ADF4151EB1Z AD [Analog Devices], EVAL-ADF4151EB1Z Datasheet
EVAL-ADF4151EB1Z
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EVAL-ADF4151EB1Z Summary of contents
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Data Sheet FEATURES Fractional-N synthesizer and integer-N synthesizer RF bandwidth to 3.5 GHz 3 3.6 V power supply 1.8 V logic compatibility Separate charge pump supply (V ) allows extended tuning P voltage ( ...
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ADF4151 TABLE OF CONTENTS Features .............................................................................................. 1 Applications ....................................................................................... 1 General Description ......................................................................... 1 Functional Block Diagram .............................................................. 1 Revision History ............................................................................... 2 Specifications ..................................................................................... 3 Timing Characteristics ................................................................ 5 Absolute Maximum Ratings ............................................................ 6 Transistor Count ........................................................................... 6 ESD ...
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Data Sheet SPECIFICATIONS 3.3 V ± 10 VDD temperature range is −40°C to +85°C. Table 1. Parameter REF CHARACTERISTICS IN Input Frequency Input Sensitivity Input Capacitance Input Current RF INPUT CHARACTERISTICS ...
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... The PLL phase noise is composed of 1/f (flicker) noise plus the normalized PLL noise floor. The formula for calculating the 1/f noise contribution frequency (f and at a frequency offset (f) is given log(10 kHz/ log(f 1_f 5 Spurious measured on EVAL-ADF4151EB1Z with RF buffer between VCO output and RF input by-passed, using a Rohde & Schwarz FSUP signal source analyzer. B Version Min Typ Max Unit − ...
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Data Sheet TIMING CHARACTERISTICS 3.3 V ± 10 VDD Operating temperature range is −40°C to +85°C. Table 2. Parameter Limit (B Version ...
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ADF4151 ABSOLUTE MAXIMUM RATINGS T = 25°C, unless otherwise noted. A Table 3. Parameter GND ...
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Data Sheet PIN CONFIGURATION AND FUNCTION DESCRIPTIONS Table 4. Pin Function Descriptions Pin No. Mnemonic Description 1 CLK Serial Clock Input. Data is clocked into the 32-bit shift register on the CLK rising edge. This input is a high impedance ...
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ADF4151 Pin No. Mnemonic Description 22 R Connecting a resistor between this pin and GND sets the charge pump output current. The nominal voltage SET bias at the where 5.1 kΩ. SET I = ...
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Data Sheet TYPICAL PERFORMANCE CHARACTERISTICS 0 –5 –10 –15 –20 –25 –30 –35 –40 0 0.5 1.0 1.5 2.0 2.5 FREQUENCY (GHz) Figure 4. RF Input Sensitivity 6.0 5.5 5.0 4.5 4.5mA 4.0 3.5 3.0 2.5 2.25mA 2.0 1.5 1.13mA ...
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ADF4151 –60 –80 –100 –120 –140 –160 –180 1k 10k 100k FREQUENCY OFFSET (Hz) Figure 8. Integer-N Phase Noise and Spur Performance; Low Noise Mode; VCO = 1750 MHz, REF OUT PFD = 25 MHz, Loop Filter Bandwidth = 50 ...
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Data Sheet CIRCUIT DESCRIPTION REFERENCE INPUT SECTION The reference input stage is shown in Figure 14. SW1 and SW2 are normally closed switches. SW3 is normally open. When power-down is initiated, SW3 is closed and SW1 and SW2 are opened. ...
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ADF4151 MUXOUT AND LOCK DETECT The output multiplexer on the ADF4151 to access various internal points on the chip. The state of MUXOUT is controlled by M3, M2, and M1 (for details, see Figure 21). Figure 17 shows the MUXOUT ...
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Data Sheet REGISTER MAPS 16-BIT INTEGER VALUE (INT) DB31 DB30 DB29 DB28 DB27 DB26 DB25 DB24 DB23 DB22 DB21 DB20 DB19 DB18 DB17 DB16 DB15 DB14 DB13 DB12 DB11 DB10 DB9 DB8 DB7 DB6 DB5 DB4 DB3 0 N16 N15 ...
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ADF4151 16-BIT INTEGER VALUE (INT) DB31 DB30 DB29 DB28 DB27 DB26 DB25 DB24 DB23 DB22 DB21 DB20 DB19 DB18 DB17 DB16 DB15 DB14 DB13 DB12 DB11 DB10 DB9 DB8 DB7 DB6 DB5 DB4 0 N16 N15 N14 N13 N12 N11 ...
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Data Sheet LOW NOISE AND LOW SPUR MUXOUT MODES DB31 DB30 DB29 DB28 DB27 DB26 DB25 DB24 DB23 DB22 DB21 DB20 DB19 DB18 DB17 DB16 DB15 DB14 DB13 DB12 DB11 DB10 DB9 DB8 DB7 DB6 DB5 DB4 DB3 0 L2 ...
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ADF4151 RESERVED DB31 DB30 DB29 DB28 DB27 DB26 DB25 DB24 DB23 DB22 DB21 DB20 DB19 DB18 DB17 DB16 DB15 DB14 DB13 DB12 DB11 DB10 DB9 DB8 DB7 DB6 DB5 DB4 ...
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Data Sheet REGISTER 0 Control Bits With Bits[C3:C1] set Register 0 is programmed. Figure 19 shows the input data format for programming this register. 16-Bit Integer Value (INT) These 16 bits set the INT value, which ...
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ADF4151 MUXOUT The on-chip multiplexer is controlled by Bits[DB28:DB26] (see Figure 21). Reference Doubler Setting DB25 to 0 feeds the REF signal directly to the 10-bit IN R counter, disabling the doubler. Setting this bit to 1 multiplies the REF ...
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Data Sheet REGISTER 3 Control Bits With Bits[C3:C1] set Register 3 is programmed. Figure 22 shows the input data format for programming this register. Antibacklash Pulse Width Setting DB22 to 0 sets the PFD antibacklash pulse ...
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ADF4151 RF SYNTHESIZER—A WORKED EXAMPLE The following is an example of how to program the synthesizer [INT + (FRAC/MOD)] × [f OUT where the RF frequency output. OUT INT is the integer division factor. FRAC is ...
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Data Sheet A 13 MHz reference signal can be fed directly to the PFD, and the modulus can be programmed to 520 when in PDC mode (13 MHz/520 = 25 kHz). The modulus needs to be reprogrammed to 65 for ...
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ADF4151 FAST LOCK—AN EXAMPLE If a PLL has a reference frequency of 13 MHz and a required lock time of 50 µs, the PLL is set to wide bandwidth for 40 µs. This example assumes a modulus of ...
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Data Sheet Reference Spurs Reference spurs are generally not a problem in fractional-N synthesizers because the reference offset is far outside the loop bandwidth. However, any reference feedthrough mechanism that bypasses the loop can cause a problem. Feedthrough of low ...
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ADF4151 APPLICATIONS INFORMATION DIRECT CONVERSION MODULATOR Direct conversion architectures are increasingly being used to implement base station transmitters. Figure 29 shows how Analog Devices, Inc., parts can be used to implement such a system. The circuit block diagram shows the ...
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Data Sheet INTERFACING The ADF4151 has a simple SPI-compatible serial interface for writing to the device. CLK, DATA, and LE control the data transfer. When LE goes high, the 32 bits that have been clocked into the appropriate register on ...
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... ADF4151 OUTLINE DIMENSIONS PIN 1 INDICATOR 0.80 0.75 0.70 SEATING PLANE ORDERING GUIDE Model 1 Temperature Range ADF4151BCPZ −40°C to +85°C ADF4151BCPZ-RL7 −40°C to +85°C EVAL-ADF4151EB1Z RoHS Compliant Part. 5.10 0.30 5.00 SQ 0.25 4.90 0. 0.50 BSC 17 16 0.50 TOP VIEW 0.40 0.30 0.05 MAX 0.02 NOM COPLANARITY 0.08 0.20 REF COMPLIANT TO JEDEC STANDARDS MO-220-WHHD. Figure 32. 32-Lead Lead Frame Chip Scale Package [LFCSP_WQ × ...
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Data Sheet NOTES Rev Page ADF4151 ...
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ADF4151 NOTES ©2011 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D10265-0-12/11(B) Rev Page Data Sheet ...