EVAL-ADM1063LFEB AD [Analog Devices], EVAL-ADM1063LFEB Datasheet - Page 6

• Manufacturer Part Number: EVAL-ADM1063LFEB
• Description: Multisupply Supervisor/Sequencer with ADC and Temperature Monitoring
• Manufacturer: AD [Analog Devices]

ADM1063
Parameter
DIGITAL INPUTS (VXn, A0, A1)
SERIAL BUS DIGITAL INPUTS (SDA, SCL)
SERIAL BUS TIMING
SEQUENCING ENGINE TIMING
1
2
3
At least one of the VH, VP1 to VP4 pins must be ≥3.0 V to maintain the device supply on VDDCAP.
All temperature sensor measurements are taken with round-robin loop enabled and at least one other voltage input being measured.
Specification is not production tested, but is supported by characterization data at initial product release.
Standard (Digital Output) Mode
Three-State Output Leakage Current
Oscillator Frequency
Input High Voltage, V
Input Low Voltage, V
Input High Current, I
Input Low Current, I
Input Capacitance
Programmable Pull-Down Current,
Input High Voltage, V
Input Low Voltage, V
Output Low Voltage, V
Clock Frequency, f
Bus Free Time, t
Start Setup Time, t
Start Hold Time, t
SCL Low Time, t
SCL High Time, t
SCL, SDA Rise Time, t
SCL, SDA Fall Time, t
Data Setup Time, t
Data Hold Time, t
Input Low Current, I
State Change Time
(PDO1 to PDO10)
V
V
I
I
R
I
I
OL
SINK
SOURCE
PULL-DOWN
OH
OL
PULL-UP
3
3
(VPn)
3
BUF
LOW
HIGH
HD;STA
HD;DAT
SCLK
SU;STA
SU;DAT
IL
IL
f
IH
IL
IL
r
IH
IH
OL
3
Min
2.4
V
0
90
2.0
−1
2.0
4.7
4.7
4
4.7
4
250
5
PU
− 0.3
Typ
20
100
5
20
10
Rev. 0 | Page 6 of 36
Max
4.5
0.50
20
60
2
10
110
0.8
1
0.8
0.4
400
1000
300
1
Unit
V
V
V
V
mA
mA
kΩ
mA
µA
kHz
V
V
µA
µA
pF
µA
V
V
V
kHz
µs
µs
µs
µs
µs
µs
µs
ns
ns
µA
µs
Test Conditions/Comments
V
V
V
I
Maximum sink current per PDO pin
Maximum total sink for all PDO pins
Internal pull-up
Current load on any VPn pull-ups, that is, total
source current available through any number of
PDO pull-up switches configured onto any one
V
All on-chip time delays derived from this clock
Maximum V
Maximum V
V
V
VDDCAP = 4.75, T
required
I
V
OL
OUT
PU
PU
PU
PDO
IN
IN
IN
= 20 mA
= 5.5 V
= 0
= 0
(pull-up to VDDCAP or VPn) = 2.7 V, I
to VPn = 6.0 V, I
≤ 2.7 V, I
= −3.0 mA
= 14.4 V
OH
IN
IN
= 5.5 V
= 5.5 V
= 0.5 mA
A
OH
= 25°C if known logic state is
= 0 mA
OH
= 0.5 mA