DM7556J National Semiconductor, DM7556J Datasheet

DM7556J

Manufacturer Part Number

DM7556J

Description

CDIP

Manufacturer

National Semiconductor

Datasheets

1.DM8556N.pdf (8 pages)

2.DM7556.pdf (8 pages)

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C 1995 National Semiconductor Corporation

DM7556 DM8556 TRI-STATE Programmable

Binary Counters

General Description

These circuits are synchronous edge-sensitive fully-pro-

grammable 4-bit counters The counters feature both con-

ventional totem-pole and TRI-STATE outputs such that

when the outputs are in the high impedance mode they can

be used to enter data from the bus lines In addition the

clear input operates completely independent of all other in-

puts During the programming operation data is loaded into

the flip-flops on the positive-going edge of the clock pulse

To facilitate cascading of these counters the MAX COUNT

output can be tied directly into the count enable input of the

next counter

Connection Diagram

Function Table

TRI-STATE is a registered trademark of the National Semiconductor Corporation

The I O pins are used as inputs when they are TRI-STATED and the LOAD input is Low They are outputs and active

when LOAD input is High and OD is Low

a b c d

were established

LOAD

Low Level (Steady State)

Don’t Care including transitions

High Level (Steady State)

The level of the steady state input at inputs A B C D respectively

Control Inputs

TL F 6588

CLK

The level of Q

See NS Package Number J16A or N16A

Order Number DM7556J or DM8556N

Reset

Dual-In-Line Package

I O

respectively before the indicated steady state input conditions

I O

I O Ports

COUNT

Features

Typical clock frequency 35 MHz

TRI-STATE outputs

Fully independent clear

Synchronous loading

Cascading circuitry provided internally

I O

Active Outputs

TL F 6588 – 1

COUNT

RRD-B30M105 Printed in U S A

August 1989

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