MBM29LV160B90PFTN Fujitsu, MBM29LV160B90PFTN Datasheet
MBM29LV160B90PFTN
Manufacturer Part Number
MBM29LV160B90PFTN
Description
Manufacturer
Fujitsu
Specifications of MBM29LV160B90PFTN
Date_code
08+
FUJITSU SEMICONDUCTOR
FLASH MEMORY
CMOS
16M (2M
MBM29LV160T
Embedded Erase
FEATURES
• Single 3.0 V read, program and erase
• Compatible with JEDEC-standard commands
• Compatible with JEDEC-standard world-wide pinouts
• Minimum 100,000 program/erase cycles
• High performance
• Sector erase architecture
• Boot Code Sector Architecture
• Embedded Erase
• Embedded program
• Data Polling and Toggle Bit feature for detection of program or erase cycle completion
• Ready/Busy output (RY/BY)
• Automatic sleep mode
• Low V
DATA SHEET
Minimizes system level power requirements
Uses same software commands as E
48-pin TSOP (I) (Package suffix: PFTN-Normal Bend Type, PFTR-Reversed Bend Type)
46-pin SON (Package suffix: PN)
48-pin CSOP (Package suffix: PCV)
48-ball FBGA (Package suffix: PBT)
80 ns maximum access time
One 8K word, two 4K words, one 16K word, and thirty-one 32K words sectors in word mode
One 16K byte, two 8K bytes, one 32K byte, and thirty-one 64K bytes sectors in byte mode
Any combination of sectors can be concurrently erased. Also supports full chip erase
T = Top sector
B = Bottom sector
Automatically pre-programs and erases the chip or any sector
Automatically programs and verifies data at specified address
Hardware method for detection of program or erase cycle completion
When addresses remain stable, automatically switches themselves to low power mode
CC
TM
write inhibit
and Embedded Program
TM
Algorithms
TM
Algorithms
2.5 V
TM
-80/-90/-12
are trademarks of Advanced Micro Devices, Inc.
8/1M
2
PROMs
/MBM29LV160B
16) BIT
DS05-20846-4E
-80/-90/-12
(Continued)
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