SCAN18373TSSCX Fairchild Semiconductor, SCAN18373TSSCX Datasheet - Page 2
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SCAN18373TSSCX
Manufacturer Part Number
SCAN18373TSSCX
Description
TRANSPARENT LATCH 9-BIT 56-SSOP
Manufacturer
Fairchild Semiconductor
Series
SCANr
Datasheet
1.SCAN18373TSSCX.pdf
(12 pages)
Specifications of SCAN18373TSSCX
Logic Type
D-Type Transparent Latch
Circuit
9:9
Output Type
Tri-State
Voltage - Supply
4.5 V ~ 5.5 V
Independent Circuits
2
Delay Time - Propagation
2.5ns
Current - Output High, Low
24mA, 48mA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
56-SSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
www.fairchildsemi.com
Functional Description
The SCAN18373T consists of two sets of nine D-type
latches with 3-STATE standard outputs. When the Latch
Enable (ALE or BLE) input is HIGH, data on the inputs
(AI
latches are transparent, i.e., a latch output will change
state each time its input changes. When Latch Enable is
LOW, the latches store the information that was present on
Logic Diagram
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
Block Diagrams
(0–8)
or BI
(0–8)
) enters the latches. In this condition the
Byte-A
2
the inputs a set-up time preceding the HIGH-to-LOW tran-
sition of the Latch Enable. The 3-STATE standard outputs
are controlled by the Output Enable (AOE
When Output Enable is LOW, the standard outputs are in
the 2-state mode. When Output Enable is HIGH, the stan-
dard outputs are in the high impedance mode, but this
does not interfere with entering new data into the latches.
1
or BOE
1
) input.