74ALVC373PW,118 NXP Semiconductors, 74ALVC373PW,118 Datasheet
74ALVC373PW,118
Specifications of 74ALVC373PW,118
74ALVC373PW-T
935269731118
Related parts for 74ALVC373PW,118
74ALVC373PW,118 Summary of contents
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Octal D-type transparent latch; 3-state Rev. 02 — 18 October 2007 1. General description The 74ALVC373 is an octal D-type transparent latch featuring separate D-type inputs for each latch and 3-state true outputs for bus-oriented applications. A latch enable ...
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... NXP Semiconductors 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name 74ALVC373D +85 C 74ALVC373PW +85 C 74ALVC373BQ + Functional diagram Fig 1. Logic symbol Fig 3. Functional diagram 74ALVC373_2 Product data sheet Description SO20 plastic small outline package; 20 leads; body width 7.5 mm TSSOP20 plastic thin shrink small outline package ...
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... NXP Semiconductors Fig 4. Logic diagram (one latch Fig 5. Logic diagram 74ALVC373_2 Product data sheet Rev. 02 — 18 October 2007 74ALVC373 Octal D-type transparent latch; 3-state Q mna189 mna883 © NXP B.V. 2007. All rights reserved ...
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... NXP Semiconductors 5. Pinning information 5.1 Pinning 373A GND 10 001aad090 Fig 6. Pin configuration SO20 and TSSOP20 5.2 Pin description Table 2. Pin description Symbol Pin D[0: 13, 14, 17 Q[0: 12, 15, 16 GND 10 74ALVC373_2 Product data sheet (1) The die substrate is attached to this pad using conductive die attach material. It can not be used as a supply pin or input. Fig 7. Pin confi ...
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... NXP Semiconductors 6. Functional description [1] Table 3. Functional table Operating modes Input OE Enable and read register L (transparent mode) L Latch and read register L L Latch register and disable H outputs H [ HIGH voltage level h = HIGH voltage level one set-up time prior to the HIGH-to-LOW LE transition L = LOW voltage level l = LOW voltage level one set-up time prior to the HIGH-to-LOW LE transition X = don’ ...
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... NXP Semiconductors 8. Recommended operating conditions Table 5. Recommended operating conditions Symbol Parameter V supply voltage CC V input voltage I V output voltage O T ambient temperature amb t/ V input transition rise and fall rate 9. Static characteristics Table 6. Static characteristics At recommended operating conditions. Voltages are referenced to GND (ground = 0 V). ...
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... NXP Semiconductors Table 6. Static characteristics At recommended operating conditions. Voltages are referenced to GND (ground = 0 V). Symbol Parameter I OFF-state output current OZ I power-off leakage supply OFF I supply current CC I additional supply current CC C input capacitance I [1] All typical values are measured at V 10. Dynamic characteristics Table 7 ...
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... NXP Semiconductors Table 7. Dynamic characteristics Voltages are referenced to GND (ground = 0 V). For test circuit see Symbol Parameter t pulse width W t set-up time su t hold time h C power dissipation PD capacitance [1] Typical values are measured the same as t and PHL PLH t is the same as t and t ...
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... NXP Semiconductors 11. Waveforms Measurement points are given in V and V are the typical output voltage levels that occur with the output load Fig 8. Input Dn to output Qn propagation delay times Table 8. Measurement points Supply voltage 1. 1.95 V 0.5V 2 2.7 V 0.5V 2.7 V 1 ...
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... NXP Semiconductors OE input Q output n LOW-to-OFF OFF-to-LOW Q output n HIGH-to-OFF OFF-to-HIGH Measurement points are given in V and V are the typical output voltage levels that occur with the output load Fig 10. Enable and disable times Dn input LE input Measurement points are given in The shaded areas indicate when the input is permitted to change for predicable output performance. ...
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... NXP Semiconductors Test data is given in Table 9. Definitions for test circuit Load resistance Load capacitance including jig and probe capacitance Termination resistance should be equal to output impedance External voltage for measuring switching times. EXT Fig 12. Test circuitry for switching times Table 9. Test data ...
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... NXP Semiconductors 12. Package outline SO20: plastic small outline package; 20 leads; body width 7 pin 1 index 1 e DIMENSIONS (inch dimensions are derived from the original mm dimensions) A UNIT max. 0.3 2.45 2.65 mm 0.25 0.1 2.25 0.012 0.096 0.1 inches 0.01 0.004 0.089 Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. ...
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... NXP Semiconductors TSSOP20: plastic thin shrink small outline package; 20 leads; body width 4 pin 1 index 1 DIMENSIONS (mm are the original dimensions) A UNIT max. 0.15 0.95 mm 1.1 0.25 0.05 0.80 Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. ...
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... NXP Semiconductors DHVQFN20: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 20 terminals; body 2.5 x 4.5 x 0.85 mm terminal 1 index area terminal 1 index area DIMENSIONS (mm are the original dimensions) (1) A UNIT max. 0.05 0. 0.2 0.00 0.18 Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. ...
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... Document ID Release date 74ALVC373_2 20071018 • Modifications: The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors. • Legal texts have been adapted to the new company name where appropriate. • Section • Section • ...
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... For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail ...
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... NXP Semiconductors 17. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 3 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 4 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 5 Pinning information . . . . . . . . . . . . . . . . . . . . . . 4 5.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 5.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4 6 Functional description . . . . . . . . . . . . . . . . . . . 5 7 Limiting values Recommended operating conditions Static characteristics Dynamic characteristics . . . . . . . . . . . . . . . . . . 7 11 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 12 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 12 13 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 15 14 Revision history ...