MC74VHCT125ADT ON Semiconductor, MC74VHCT125ADT Datasheet

MC74VHCT125ADT

Manufacturer Part Number

MC74VHCT125ADT

Description

Manufacturer

ON Semiconductor

Datasheets

1.MC74VHCT125A.pdf (7 pages)

2.MC74VHCT125ADT.pdf (8 pages)

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MC74VHCT125A

Quad Bus Buffer

with 3–State Control Inputs

fabricated with silicon gate CMOS technology. It achieves high speed

operation similar to equivalent Bipolar Schottky TTL while

maintaining CMOS low power dissipation.

set High to place the output into the high impedance state.

be used as a level converter for interfacing 3.3V to 5.0V, because it has

full 5V CMOS level output swings.

between 0V and 5.5V are applied, regardless of the supply voltage.

The output structures also provide protection when V CC = 0V. These

input and output structures help prevent device destruction caused by

supply voltage – input/output voltage mismatch, battery backup, hot

insertion, etc.

output which provides high noise immunity and stable output. The

inputs tolerate voltages up to 7V, allowing the interface of 5V systems

to 3V systems.

April, 2000 – Rev. 1

The MC74VHCT125A is a high speed CMOS quad bus buffer

The MC74VHCT125A requires the 3–state control input (OE) to be

The VHCT inputs are compatible with TTL levels. This device can

The VHCT125A input structures provide protection when voltages

The internal circuit is composed of three stages, including a buffer

High Speed: t PD = 3.8ns (Typ) at V CC = 5V

Low Power Dissipation: I CC = 4 A (Max) at T A = 25 C

TTL–Compatible Inputs: V IL = 0.8V; V IH = 2.0V

Power Down Protection Provided on Inputs

Balanced Propagation Delays

Designed for 2V to 5.5V Operating Range

Low Noise: V OLP = 0.8V (Max)

Pin and Function Compatible with Other Standard Logic Families

Latchup Performance Exceeds 300mA

ESD Performance: HBM > 2000V; Machine Model > 200V

Chip Complexity: 72 FETs or 18 Equivalent Gates

Semiconductor Components Industries, LLC, 2000

OE1

OE2

OE3

OE4

Active–Low Output Enables

LOGIC DIAGRAM

FUNCTION TABLE

Inputs

VHCT125A

Output

For detailed package marking information, see the Marking

Diagram section on page 4 of this data sheet.

MC74VHCT125AD

MC74VHCT125ADT

MC74VHCT125AM

14–LEAD SOIC

Device

CASE 751A

MARKING DIAGRAM (Top View)

D SUFFIX

ORDERING INFORMATION

PIN CONNECTION AND

GND

OE1

OE2

http://onsemi.com

14–LEAD SOIC EIAJ

CASE 965

M SUFFIX

SOIC EIAJ

Package

TSSOP

Publication Order Number:

SOIC

14–LEAD TSSOP

MC74VHCT125A/D

CASE 948G

DT SUFFIX

V CC

OE4

OE3

55 Units/Rail

96 Units/Rail

50 Units/Rail

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