ML4824IP2 Fairchild Semiconductor, ML4824IP2 Datasheet

ML4824IP2

Manufacturer Part Number

ML4824IP2

Description

Manufacturer

Fairchild Semiconductor

Datasheets

1.ML4824IP2.pdf (16 pages)

2.ML4824IP2.pdf (16 pages)

Specifications of ML4824IP2

Case

DIP

Date_code

06+

Current page: 1 of 16
Download datasheet (129Kb)

GENERAL DESCRIPTION

The ML4824 is a controller for power factor corrected,

switched mode power supplies. Power Factor Correction

(PFC) allows the use of smaller, lower cost bulk capacitors,

reduces power line loading and stress on the switching

FETs, and results in a power supply that fully complies

with IEC1000-2-3 specification. The ML4824 includes

circuits for the implementation of a leading edge, average

current, “boost” type power factor correction and a trailing

edge, pulse width modulator (PWM).

The device is available in two versions; the ML4824-1

Doubling the switching frequency of the PWM allows the

user to design with smaller output components while

maintaining the best operating frequency for the PFC. An

over-voltage comparator shuts down the PFC section in the

event of a sudden decrease in load. The PFC section also

includes peak current limiting and input voltage brown-

out protection. The PWM section can be operated in

current or voltage mode at up to 250kHz and includes a

duty cycle limit to prevent transformer saturation.

BLOCK DIAGRAM

PWM

Power Factor Correction and PWM Controller Combo

V FB

I AC

V RMS

I SENSE

RAMP 1

RAMP 2

V DC

DC I LIMIT

2.5V

= f

V CC

PFC

50µA

) and the ML4824-2 (f

–

VEA

VEAO

MODULATOR

1.25V

GAIN

3.5k

–

PWM

–

IEA

IEAO

–

= 2 x f

(-2 VERSION ONLY)

OSCILLATOR

PFC

–

2.5V

V FB

POWER FACTOR CORRECTOR

PULSE WIDTH MODULATOR

–

x 2

V IN OK

DUTY CYCLE

FEATURES

LIMIT

Internally synchronized PFC and PWM in one IC

Low total harmonic distortion

Reduces ripple current in the storage capacitor between

the PFC and PWM sections

Average current, continuous boost leading edge PFC

Fast transconductance error amp for voltage loop

High efficiency trailing edge PWM can be configured

for current mode or voltage mode operation

Average line voltage compensation with brownout

control

PFC overvoltage comparator eliminates output

“runaway” due to load removal

Current fed gain modulator for improved noise immunity

Overvoltage protection, UVLO, and soft start

2.7V

–1V

PFC I LIMIT

–

OVP

–

DC I LIMIT

V CCZ

13.5V

UVLO

REFERENCE

7.5V

REV. 1.01 12/7/2000

ML4824

V CC

December 2000

PWM OUT

PFC OUT

V REF

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