MC74LVX373DTR2G ON Semiconductor, MC74LVX373DTR2G Datasheet

MC74LVX373DTR2G

Manufacturer Part Number

MC74LVX373DTR2G

Description

IC LATCH TRANSP OCT 3ST 20-TSSOP

Manufacturer

ON Semiconductor

Series

74LVXr

Datasheet

1.MC74LVX373DTR2G.pdf (8 pages)

Specifications of MC74LVX373DTR2G

Logic Type

D-Type Transparent Latch

Circuit

8:8

Output Type

Tri-State

Voltage - Supply

2 V ~ 3.6 V

Independent Circuits

Delay Time - Propagation

5.8ns

Current - Output High, Low

4mA, 4mA

Operating Temperature

-40°C ~ 85°C

Mounting Type

Surface Mount

Package / Case

20-TSSOP

Lead Free Status / RoHS Status

Lead free / RoHS Compliant

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MC74LVX373

Octal D−Type Latch

with 3−State Outputs

With 5V−Tolerant Inputs

with 3−state outputs. The inputs tolerate voltages up to 7.0 V, allowing

the interface of 5.0 V systems to 3.0 V systems.

output enable input. When the output enable input is high, the eight

outputs are in a high impedance state.

Features

*For additional information on our Pb−Free strategy and soldering details, please

March, 2005 − Rev. 2

download the ON Semiconductor Soldering and Mounting Techniques

Reference Manual, SOLDERRM/D.

The MC74LVX373 is an advanced high speed CMOS octal latch

This 8−bit D−type latch is controlled by a latch enable input and an

High Speed: t

Low Power Dissipation: I

Power Down Protection Provided on Inputs

Balanced Propagation Delays

Low Noise: V

Pin and Function Compatible with Other Standard Logic Families

Latchup Performance Exceeds 300 mA

ESD Performance:

Pb−Free Packages are Available*

Semiconductor Components Industries, LLC, 2005

Figure 1. 20−Lead Pinout (Top View)

Human Body Model > 2000 V;

Machine Model > 200 V

OLP

= 5.8 ns (Typ) at V

= 0.8 V (Max)

= 4 mA (Max) at T

= 3.3 V

= 25 C

GND

See detailed ordering and shipping information in the package

dimensions section on page 5 of this data sheet.

PIN NAMES

Pins

D0−D7

O0−O7

ORDERING INFORMATION

L, WL

Y, YY

W, WW

Function

Output Enable Input

Latch Enable Input

Data Inputs

3−State Latch Outputs

http://onsemi.com

CASE 948E

DT SUFFIX

SOEIAJ−20

TSSOP−20

M SUFFIX

CASE 967

DW SUFFIX

CASE 751D

SOIC−20

= Assembly Location

= Wafer Lot

= Year

= Work Week

Publication Order Number:

DIAGRAMS

MARKING

MC74LVX373/D

74LVX373

AWLYWW

AWLYYWW

ALYW

LVX373

LVX

373

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MC74LVX373DTR2G Summary of contents

Page 1

... Pb−Free Packages are Available Figure 1. 20−Lead Pinout (Top View) *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. Semiconductor Components Industries, LLC, 2005 March, 2005 − Rev 3 GND 1 http://onsemi.com MARKING DIAGRAMS 20 SOIC− ...

Page 2

Figure 2. Logic Diagram INPUTS ...

Page 3

MAXIMUM RATINGS Î Î Î Î Î ...

Page 4

AC ELECTRICAL CHARACTERISTICS Î Î Î Î ...

Page 5

ORDERING INFORMATION Device MC74LVX373DWR2 MC74LVX373DWR2G MC74LVX373DTR2 MC74LVX373M MC74LVX373MG MC74LVX373MEL MC74LVX373MELG †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. *This package is inherently Pb−Free. D ...

Page 6

20X T 0. 18X A1 K 20X REF 0.10 (0.004) 0.15 (0.006 L PIN 1 IDENT 1 0.15 ...

Page 7

0.10 (0.004) 0.13 (0.005) M MC74LVX373 PACKAGE DIMENSIONS SOEIAJ−20 M SUFFIX CASE 967−01 ISSUE DETAIL P VIEW http://onsemi.com ...

Page 8

... Fax: 480−829−7709 or 800−344−3867 Toll Free USA/Canada Email: orderlit@onsemi.com MC74LVX373 N. American Technical Support: 800−282−9855 Toll Free USA/Canada Japan: ON Semiconductor, Japan Customer Focus Center 2−9−1 Kamimeguro, Meguro−ku, Tokyo, Japan 153−0051 Phone: 81−3−5773−3850 http://onsemi.com 8 ON Semiconductor Website: http://onsemi ...

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