MC74ACT373DWR2G ON Semiconductor, MC74ACT373DWR2G Datasheet - Page 5

• Manufacturer Part Number: MC74ACT373DWR2G
• Description: IC LATCH OCT TRNSP 3STATE 20SOIC
• Manufacturer: ON Semiconductor
• Series: 74ACTr

Specifications of MC74ACT373DWR2G

• Logic Type: D-Type Transparent Latch
• Circuit: 8:8
• Output Type: Tri-State
• Voltage - Supply: 4.5 V ~ 5.5 V
• Independent Circuits: 1
• Delay Time - Propagation: 7ns
• Current - Output High, Low: 24mA, 24mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 20-SOIC (7.5mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: MC74ACT373DWR2GOS

*Voltage Range 3.3 V is 3.3 V ±0.3 V.
*Voltage Range 3.3 V is 3.3 V ±0.3 V.
AC CHARACTERISTICS
AC OPERATING REQUIREMENTS
Voltage Range 5.0 V is 5.0 V ±0.5 V.
Voltage Range 5.0 V is 5.0 V ±0.5 V.
Symbol
Symbol
t
t
t
t
t
t
t
t
PZH
PHZ
PLH
PHL
PLH
PHL
PZL
PLZ
t
t
t
w
s
h
Propagation Delay
D
Propagation Delay
D
Propagation Delay
LE to O
Propagation Delay
LE to O
Output Enable Time
Output Enable Time
Output Disable Time
Output Disable Time
Setup Time, HIGH or LOW
D
Hold Time, HIGH or LOW
D
LE Pulse Width, HIGH
n
n
n
n
to O
to O
to LE
to LE
n
n
n
n
Parameter
(For Figures and Waveforms − See AND8277/D at www.onsemi.com)
Parameter
MC74AC373, MC74ACT373
http://onsemi.com
V
(V)
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
CC
*
5
Min
1.5
1.5
1.5
1.5
1.5
1.5
1.5
1.5
1.5
1.5
1.5
1.5
1.5
1.5
1.5
1.5
V
(V)
3.3
5.0
3.3
5.0
3.3
5.0
CC
T
C
A
*
L
74AC
= +25°C
= 50 pF
Typ
7.0
9.5
7.0
7.5
9.5
7.0
9.0
7.0
8.5
6.5
8.0
8.0
6.5
10
10
10
−3.0
−1.5
Typ
3.5
2.0
4.0
2.0
T
C
A
L
74AC
= +25°C
= 50 pF
Max
13.5
13.5
12.5
12.5
11.5
11.5
11.5
9.5
9.5
9.5
9.5
8.5
8.5
8.5
13
11
Guaranteed Minimum
5.5
4.0
1.0
1.0
5.5
4.0
Min
1.5
1.5
1.5
1.5
1.5
1.5
1.5
1.5
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
T
C
to +85°C
A
L
T
C
74AC
A
to +85°C
= −40°C
= 50 pF
L
74AC
= −40°C
= 50 pF
6.0
4.5
1.0
1.0
6.0
4.5
Max
10.5
14.5
10.5
10.5
10.5
14.5
12.5
12.5
9.5
9.5
15
15
14
13
13
10
Unit
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Fig.
Fig.
No.
3−5
3−5
3−6
3−6
3−7
3−8
3−7
3−8
No.
3−9
3−9
3−6