AM27C2048-120DC Advanced Micro Devices, AM27C2048-120DC Datasheet

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AM27C2048-120DC

Manufacturer Part Number
AM27C2048-120DC
Description
Manufacturer
Advanced Micro Devices
Datasheet

Specifications of AM27C2048-120DC

Case
CDIP-40
Date_code
1995+

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Am27C2048
2 Megabit (128 K x 16-Bit) CMOS EPROM
DISTINCTIVE CHARACTERISTICS
GENERAL DESCRIPTION
The Am27C2048 is a 2 Mbit, ultraviolet erasable pro-
grammable read-only memory. It is organized as 128 K
words, operates from a single +5 V supply, has a static
standby mode, and features fast single address loca-
tion programming. The Am27C2048 is ideal for use in
16-bit microprocessor systems. The device is available
in windowed ceramic DIP packages, and plastic one
time programmable (OTP) PDIP and PLCC packages.
Data can be typically accessed in less than 55 ns, al-
lowing high-performance microprocessors to operate
without any WAIT states. The device offers separate
Output Enable (OE#) and Chip Enable (CE#) controls,
BLOCK DIAGRAM
Fast access time
— Speed options as fast as 55 ns
Low power consumption
— 100 µA maximum CMOS standby current
JEDEC-approved pinout
— Plug-in upgrade of 1 Mbit EPROM
— 40-pin DIP/PDIP
— 44-pin PLCC
Single +5 V power supply
FINAL
A0–A16
Address
Inputs
PGM#
OE#
CE#
Output Enable
Chip Enable
Prog Logic
V
V
V
Decoder
Decoder
CC
SS
PP
and
Y
X
thus eliminating bus contention in a multiple bus micro-
processor system.
AMD’s CMOS process technology provides high
speed, low power, and high noise immunity. Typical
power consumption is only 125 mW in active mode,
and 100 µW in standby mode.
All signals are TTL levels, including programming sig-
nals. Bit locations may be programmed singly, in
blocks, or at random. The device supports AMD’s
Flashrite programming algorithm (100 µs pulses), re-
sulting in a typical programming time of 16 seconds.
100% Flashrite programming
— Typical programming time of 16 seconds
Latch-up protected to 100 mA from –1 V to
V
Versatile features for simple interfacing
— Both CMOS and TTL input/output compatibility
— Two line control functions
High noise immunity
10% power supply tolerance standard
CC
+ 1 V
Data Outputs
DQ0–DQ15
2,097,152
Buffers
Bit Cell
Output
Gating
Matrix
Y
Publication# 11407
Issue Date: May 1998
Rev: G Amendment/0
11407G-1

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