AT24C164-10SI2.7 ATMEL Corporation, AT24C164-10SI2.7 Datasheet
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AT24C164-10SI2.7
Manufacturer Part Number
AT24C164-10SI2.7
Description
Manufacturer
ATMEL Corporation
Datasheet
1.AT24C16410PI.pdf
(17 pages)
Specifications of AT24C164-10SI2.7
Case
SOP/8
Date_code
97+
Features
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Description
The AT24C164 provides 16,384 bits of serial electrically erasable and programmable
read only memory (EEPROM) organized as 2048 words of 8 bits each. The device’s
cascadable feature allows up to eight devices to share a common two-wire bus. The
device is optimized for use in many industrial and commercial applications where low
power and low voltage operation are essential. The AT24C164 is available in space
saving 8-lead PDIP and 8-lead JEDEC SOIC packages and is accessed via a two-
wire serial interface. In addition, this device is available in 2.7V (2.7V to 5.5V) and
1.8V (1.8V to 5.5V) versions.
Table 1. Pin Configurations
Pin Name
A0 - A2
SDA
SCL
WP
Low Voltage and Standard Voltage Operation
Internally Organized 2048 x 8 (16K)
Two-Wire Serial Interface
Schmitt Trigger, Filtered Inputs for Noise Suppression
Bidirectional Data Transfer Protocol
100 kHz (1.8V, 2.5V, 2.7V) and 400 kHz (5V) Compatibility
Write Protect Pin for Hardware Data Protection
Cascadable Feature Allows for Extended Densities
16-Byte Page Write Mode
Partial Page Writes Are Allowed
Self-Timed Write Cycle (10 ms max)
High Reliability
Automotive Grade, Extended Temperature and Lead-free/Halogen-free
Devices Available
8-lead PDIP and 8-lead JEDEC SOIC Packages
Die Sales: Wafer Form, Waffle Pack and Bumped Wafers
– 2.7 (V
– 1.8 (V
– Endurance: 1 Million Write Cycles
– Data Retention: 100 Years
CC
CC
= 2.7V to 5.5V)
= 1.8V to 5.5V)
Function
Address Inputs
Serial Data
Serial Clock Input
Write Protect
GND
A0
A1
A2
GND
A0
A1
A2
1
2
3
4
8-lead SOIC
8-lead PDIP
1
2
3
4
8
7
6
5
8
7
6
5
VCC
WP
SCL
SDA
VCC
WP
SCL
SDA
Note:
Two-Wire Serial
EEPROM
16K (2048 x 8)
AT24C164
1. Not recommended for a
new
refer
datasheet. For cascad-
ability features of the
AT24C164
please move to the
AT24C32C
which allows up to eight
devices that may be
addressed on a single
bus system.
Rev. 0105J–SEEPR–12/06
design;
to
(1)
AT24C16B
(A0-A2),
Please
device
1