74ACT563SCX Fairchild Semiconductor, 74ACT563SCX Datasheet

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74ACT563SCX

Manufacturer Part Number
74ACT563SCX
Description
IC LATCH OCTAL HS 3STATE 20SOIC
Manufacturer
Fairchild Semiconductor
Series
74ACTr
Datasheet

Specifications of 74ACT563SCX

Logic Type
D-Type Transparent Latch
Circuit
8:8
Output Type
Tri-State
Voltage - Supply
4.5 V ~ 5.5 V
Independent Circuits
1
Delay Time - Propagation
7ns
Current - Output High, Low
24mA, 24mA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
20-SOIC (7.5mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
©1988 Fairchild Semiconductor Corporation
74ACT563 Rev. 1.2
FACT™ is a trademark of Fairchild Semiconductor Corporation.
74ACT563
Octal Latch with 3-STATE Outputs
Features
Ordering Information
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number.
Connection Diagram
Pin Descriptions
74ACT563SC
D
LE
OE
O
0
I
Inputs and outputs on opposite sides of package allow
easy interface with microprocessors
Useful as input or output port for microprocessors
Functionally identical to ACT573 but with inverted
outputs
Outputs source/sink 24mA
ACT563 has TTL-compatible inputs
Pin Names
0
CC
–D
–O
Number
Order
7
and I
7
OZ
reduced by 50%
Data Inputs
Latch Enable Input
3-STATE Output Enable Input
3-STATE Latch Outputs
Package
Number
M20B
Description
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300"
Wide Body
General Description
The ACT563 is a high-speed octal latch with buffered
common Latch Enable (LE) and buffered common Out-
put Enable (OE) inputs.
The ACT563 device is functionally identical to the
ACT573, but with inverted outputs.
Logic Symbols
Package Description
IEEE/IEC
www.fairchildsemi.com
April 2007
tm

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74ACT563SCX Summary of contents

Page 1

... Output Enable Input O –O 3-STATE Latch Outputs 0 7 FACT™ trademark of Fairchild Semiconductor Corporation. ©1988 Fairchild Semiconductor Corporation 74ACT563 Rev. 1.2 General Description The ACT563 is a high-speed octal latch with buffered common Latch Enable (LE) and buffered common Out- put Enable (OE) inputs. ...

Page 2

... Logic Diagram Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays. ©1988 Fairchild Semiconductor Corporation 74ACT563 Rev. 1.2 Function Table Inputs OE LE ...

Page 3

... V Supply Voltage CC V Input Voltage I V Output Voltage O T Operating Temperature A ∆ ∆ t Minimum Input Edge Rate: V from 0.8V to 2.0V ©1988 Fairchild Semiconductor Corporation 74ACT563 Rev. 1.2 Parameter Parameter @ 4.5V, 5. Rating –0.5V to +7.0V –20mA +20mA –0. 0.5V CC –20mA +20mA –0. 0.5V CC ± ...

Page 4

... Minimum Dynamic OLD (2) Output Current I OHD I Maximum Quiescent CC Supply Current Notes: 1. All outputs loaded; thresholds on input associated with output under test. 2. Maximum test duration 2.0ms, one output loaded at a time. ©1988 Fairchild Semiconductor Corporation 74ACT563 Rev. 1.2 = +25° (V) Conditions Typ. = 0. ...

Page 5

... Hold Time, HIGH or LOW Pulse Width, HIGH W Note: 4. Voltage range 5.0 is 5.0V ± 0.5V. Capacitance Symbol Parameter C Input Capacitance IN C Power Dissipation Capacitance PD ©1988 Fairchild Semiconductor Corporation 74ACT563 Rev. 1.2 = +25° 50pF C L (3) V (V) Min. Typ. Max. CC 5.0 3.0 7.0 11.5 5 ...

Page 6

... Physical Dimensions Dimensions are in inches (millimeters) unless otherwise noted. Figure 2. 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide ©1988 Fairchild Semiconductor Corporation 74ACT563 Rev. 1.2 Package Number M20B 6 www.fairchildsemi.com ...

Page 7

... TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended exhaustive list of all such trademarks. ® ACEx Across the board. Around the world. ActiveArray Bottomless Build it Now CoolFET CROSSVOLT CTL™ Current Transfer Logic™ ...

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