MC74HC573ADWG ON Semiconductor, MC74HC573ADWG Datasheet

IC TRANSP LATCH OCT 3ST 20-SOIC

MC74HC573ADWG

Manufacturer Part Number
MC74HC573ADWG
Description
IC TRANSP LATCH OCT 3ST 20-SOIC
Manufacturer
ON Semiconductor
Series
74HCr
Type
D-Typer
Datasheets

Specifications of MC74HC573ADWG

Logic Type
D-Type Transparent Latch
Circuit
8:8
Output Type
Tri-State
Voltage - Supply
2 V ~ 6 V
Independent Circuits
1
Delay Time - Propagation
26ns
Current - Output High, Low
7.8mA, 7.8mA
Operating Temperature
-55°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
20-SOIC (7.5mm Width)
Circuit Type
Low-Power Schottky
Current, Supply
160 μA
Function Type
8-Channels
Logic Function
Latch
Number Of Circuits
Octal
Package Type
SOIC-20
Special Features
Non-Inverting, Tri-State
Temperature, Operating, Range
-55 to +125 °C
Voltage, Supply
2 to 6 V
Logic Family
HC
Number Of Bits
8
Number Of Elements
1
Latch Mode
Transparent
Polarity
Non-Inverting
Technology
CMOS
Propagation Delay Time
240ns
Operating Supply Voltage (typ)
2.5/3.3/5V
High Level Output Current
-7.8mA
Low Level Output Current
7.8mA
Operating Supply Voltage (min)
2V
Operating Supply Voltage (max)
6V
Operating Temp Range
-55C to 125C
Operating Temperature Classification
Military
Mounting
Surface Mount
Pin Count
20
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
MC74HC573ADWG
MC74HC573ADWGOS
MC74HC573A
Octal 3-State Noninverting
Transparent Latch
High−Performance Silicon−Gate CMOS
are compatible with standard CMOS outputs; with pullup resistors,
they are compatible with LSTTL outputs.
asynchronously) when Latch Enable is high. When Latch Enable goes
low, data meeting the setup and hold time becomes latched.
inputs on the opposite side of the package from the outputs to facilitate
PC board layout.
Features
*For additional information on our Pb−Free strategy and soldering details, please
© Semiconductor Components Industries, LLC, 2009
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
The MC74HC573A is identical in pinout to the LS573. The devices
These latches appear transparent to data (i.e., the outputs change
The HC573A is identical in function to the HC373A but has the data
Output Drive Capability: 15 LSTTL Loads
Outputs Directly Interface to CMOS, NMOS and TTL
Operating Voltage Range: 2.0 to 6.0 V
Low Input Current: 1.0 mA
In Compliance with the JEDEC Standard No. 7.0 A Requirements
Chip Complexity: 218 FETs or 54.5 Equivalent Gates
Pb−Free Packages are Available*
1
20
20
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
20
1
20
1
1
1
ORDERING INFORMATION
A
WL, L
YY, Y
WW, W
G
G
(Note: Microdot may be in either location)
DW SUFFIX
CASE 751D
CASE 948E
SOEIAJ−20
DT SUFFIX
TSSOP−20
CASE 738
CASE 967
N SUFFIX
F SUFFIX
SOIC−20
PDIP−20
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
= Pb−Free Package
Publication Order Number:
20
20
20
1
20
1
1
1
DIAGRAMS
MC74HC573AN
MC74HC573A/D
MARKING
AWLYYWWG
AWLYYWWG
AWLYWWG
74HC573A
74HC573A
ALYWG
573A
HC
G

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MC74HC573ADWG Summary of contents

Page 1

... Chip Complexity: 218 FETs or 54.5 Equivalent Gates • Pb−Free Packages are Available* *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. © Semiconductor Components Industries, LLC, 2009 20 PDIP−20 ...

Page 2

... Don’t Care Z = High Impedance ORDERING INFORMATION Device MC74HC573AN MC74HC573ANG MC74HC573ADW MC74HC573ADWG MC74HC573ADWR2 MC74HC573ADWR2G MC74HC573ADT MC74HC573ADTG MC74HC573ADTR2 MC74HC573ADTR2G MC74HC573AFEL MC74HC573AFELG †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. ...

Page 3

... Current (per Package) Î Î Î Î Î Î Î Î Î Î Î Î Î Î NOTE: Information on typical parametric values can be found in Chapter 2 of the ON Semiconductor High−Speed CMOS Data Book (DL129/D). Î Î Î Î Î Î Î Î ...

Page 4

... Used to determine the no−load dynamic power consumption Semiconductor High−Speed CMOS Data Book (DL129/D). Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î ...

Page 5

SEATING PLANE 20X 0. 18X PACKAGE DIMENSIONS PDIP−20 N SUFFIX CASE 738−03 ISSUE ...

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