74F401PC Fairchild Semiconductor, 74F401PC Datasheet
74F401PC
Specifications of 74F401PC
Related parts for 74F401PC
74F401PC Summary of contents
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... Package Number 74F401SC M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow 74F401PC N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. ...
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Unit Loading/Fan Out Pin Names S –S Polynomial Select Inputs Data Input Clock Input (Operates on HIGH-to-LOW Transition) CP CWE Check Word Enable Input Preset (Active LOW) Input P MR Master Reset (Active HIGH) Input Q Data ...
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Block Diagram FIGURE 1. Equivalent Circuit for X FIGURE 2. Check Word Generation Note 1: Check word Enable is HIGH while data is being clocked, LOW while transmission of check bits. Note 2: 74F401 must be reset or preset before ...
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Absolute Maximum Ratings Storage Temperature Ambient Temperature under Bias Junction Temperature under Bias V Pin Potential to Ground Pin CC Input Voltage (Note 5) Input Current (Note 5.0 mA Voltage Applied to Output in HIGH State ...
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AC Electrical Characteristics Symbol Parameter f Maximum Clock Frequency MAX t Propagation Delay PLH PHL t Propagation Delay PHL Propagation Delay PLH Propagation Delay PHL ...
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Physical Dimensions inches (millimeters) unless otherwise noted 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow www.fairchildsemi.com Package Number M14A 6 ...
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Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right ...