5962-9476201MXC Lattice Semiconductor Corp., 5962-9476201MXC Datasheet

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5962-9476201MXC

Manufacturer Part Number
5962-9476201MXC
Description
Manufacturer
Lattice Semiconductor Corp.
Datasheet

Specifications of 5962-9476201MXC

Case
PLCC
Date_code
97+

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
5962-9476201MXC
Manufacturer:
LATTICE
Quantity:
210
Part Number:
5962-9476201MXC
Manufacturer:
LATTICE
Quantity:
57
• HIGH-DENSITY PROGRAMMABLE LOGIC
• HIGH PERFORMANCE E
• IN-SYSTEM PROGRAMMABLE
• COMBINES EASE OF USE AND THE FAST SYSTEM
Copyright © 2002 Lattice Semiconductor Corp. All brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject
to change without notice.
LATTICE SEMICONDUCTOR CORP., 5555 Northeast Moore Ct., Hillsboro, Oregon 97124, U.S.A.
Tel. (503) 268-8000; 1-800-LATTICE; FAX (503) 268-8556; http://www.latticesemi.com
1016mil_02
Features
— High-Speed Global Interconnect
— 2000 PLD Gates
— 32 I/O Pins, Four Dedicated Inputs
— 96 Registers
— Wide Input Gating for Fast Counters, State
— Small Logic Block Size for Random Logic
— Security Cell Prevents Unauthorized Copying
— TTL Compatible Inputs and Outputs
— Electrically Erasable and Reprogrammable
— Non-Volatile E
— 100% Tested
— In-System Programmable™ (ISP™) 5-Volt Only
— Increased Manufacturing Yields, Reduced Time-to-
— Reprogram Soldered Devices for Faster Debugging
SPEED OF PLDs WITH THE DENSITY AND FLEX-
— Three Dedicated Clock Input Pins
— Synchronous and Asynchronous Clocks
— Flexible Pin Placement
— Optimized Global Routing Pool Provides Global
IBILITY OF FIELD PROGRAMMABLE GATE ARRAYS
— Complete Programmable Device Can Combine Glue
f
t
Market, and Improved Product Quality
Logic and Structured Designs
Machines, Address Decoders, etc.
Interconnectivity
max = 60 MHz Maximum Operating Frequency
pd = 20 ns Propagation Delay
2
CMOS Technology
2
CMOS
®
TECHNOLOGY
1
In-System Programmable High Density PLD
The ispLSI 1016/883 is a High-Density Programmable
Logic Device processed in full compliance to MIL-STD-
883. This military grade device contains 96 Registers, 32
Universal I/O pins, four Dedicated Input pins, three Dedi-
cated Clock Input pins and a Global Routing Pool (GRP).
The GRP provides complete interconnectivity between
all of these elements. The ispLSI 1016/883 features 5-
Volt in-system programming and in-system diagnostic
capabilities. It is the first device which offers non-volatile
reprogrammability of the logic, as well as the intercon-
nect to provide truly reconfigurable systems.
The basic unit of logic on the ispLSI 1016/883 device is
the Generic Logic Block (GLB). The GLBs are labeled A0,
A1 .. B7 (see figure 1). There are a total of 16 GLBs in the
ispLSI 1016/883 device. Each GLB has 18 inputs, a
programmable AND/OR/XOR array, and four outputs
which can be configured to be either combinatorial or
registered. Inputs to the GLB come from the GRP and
dedicated inputs. All of the GLB outputs are brought back
into the GRP so that they can be connected to the inputs
of any other GLB on the device.
Functional Block Diagram
Description
A1
A2
A3
A4
A5
A6
A7
A0
ispLSI
Global Routing Pool (GRP)
Logic
Array
®
1016/883
D Q
D Q
D Q
D Q
GLB
January 2002
B 7
B 6
B 5
B 4
B 3
B 2
B 1
B 0
CLK

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