CS4244-CNZR Cirrus Logic, Inc., CS4244-CNZR Datasheet - Page 3

• Manufacturer Part Number: CS4244-CNZR
• Description: QFN 40/IC 4 input / 5 output CODEC
• Manufacturer: Cirrus Logic, Inc.

Specifications of CS4244-CNZR

• Pack_quantity: 4000
• Comm_code: 85423990
• Lead_time: 112

CS4244
LIST OF FIGURES
Figure 1. CS4244 Pinout ............................................................................................................................. 5
Figure 2. Typical Connection Diagram ........................................................................................................ 7
Figure 3. Test Circuit for ADC Performance Testing ................................................................................. 13
Figure 4. PSRR Test Configuration ........................................................................................................... 13
Figure 5. Equivalent Output Test Load ..................................................................................................... 16
Figure 6. TDM Serial Audio Interface Timing ............................................................................................ 20
Figure 7. PCM Serial Audio Interface Timing ............................................................................................ 20
Figure 8. I²C Control Port Timing .............................................................................................................. 21
Figure 9. System Level Initialization and Power-Up/Down Sequence ...................................................... 23
Figure 10. DAC DC Loading ..................................................................................................................... 24
Figure 11. Timing, I²C Write ...................................................................................................................... 25
Figure 12. Timing, I²C Read ...................................................................................................................... 25
Figure 13. Master Mode Clocking ............................................................................................................. 27
Figure 14. TDM System Clock Format ...................................................................................................... 28
Figure 15. 32-bit Receiver Channel Block ................................................................................................. 28
Figure 16. Serial Data Coding and Extraction Options within the TDM Streams ...................................... 29
Figure 17. Left Justified Format ................................................................................................................ 30
Figure 18. I²S Format ................................................................................................................................ 30
Figure 19. Audio Path Routing .................................................................................................................. 31
Figure 20. Conventional SDOUT (Left) vs. Sidechain SDOUT (Right) Configuration ............................... 32
Figure 21. DAC1-4 Serial Data Source Selection ..................................................................................... 33
Figure 22. Example Serial Data Source Selection .................................................................................... 34
Figure 23. ADC Path ................................................................................................................................. 35
Figure 24. Single-Ended to Differential Active Input Filter ........................................................................ 36
Figure 25. Single-Ended to Differential Active Input Filter - DC Coupled Input Signal (VA/2 Centered) ... 36
Figure 26. DAC1-4 Path ............................................................................................................................ 37
Figure 27. De-emphasis Curve ................................................................................................................. 38
Figure 28. Passive Analog Output Filter ................................................................................................... 38
Figure 29. Volume Implementation for the DAC1-4 Path .......................................................................... 39
Figure 30. Soft Ramp Behavior ................................................................................................................. 40
Figure 31. Interrupt Behavior and Example Interrupt Service Routine ...................................................... 45
Figure 32. ADC Stopband Rejection ......................................................................................................... 60
Figure 33. ADC Transition Band ............................................................................................................... 60
Figure 34. ADC Transition Band (Detail) ................................................................................................... 60
Figure 35. ADC Passband Ripple ............................................................................................................. 60
Figure 36. ADC HPF (48 kHz) ................................................................................................................... 60
Figure 37. ADC HPF (96 kHz) ................................................................................................................... 60
Figure 38. SSM DAC Stopband Rejection ................................................................................................ 61
Figure 39. SSM DAC Transition Band ...................................................................................................... 61
Figure 40. SSM DAC Transition Band (Detail) .......................................................................................... 61
Figure 41. SSM DAC Passband Ripple .................................................................................................... 61
Figure 42. DSM DAC Stopband Rejection ................................................................................................ 62
Figure 43. DSM DAC Transition Band ...................................................................................................... 62
Figure 44. DSM DAC Transition Band (Detail) .......................................................................................... 62
Figure 45. DSM DAC Passband Ripple .................................................................................................... 62
Figure 46. Package Drawing ..................................................................................................................... 63
DS900PP2
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