MC100EP142FAG ON Semiconductor, MC100EP142FAG Datasheet - Page 2

• Manufacturer Part Number: MC100EP142FAG
• Description: IC REGISTER SHFT 9BIT ECL 32LQFP
• Manufacturer: ON Semiconductor
• Series: 100EPr

Specifications of MC100EP142FAG

• Logic Type: Shift Register
• Output Type: Standard
• Number Of Elements: 1
• Number Of Bits Per Element: 9
• Function: Universal
• Voltage - Supply: 3 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 32-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: MC100EP142FAGOS

Table 1. PIN DESCRIPTION
1,23,24,25,26,
1. All V
V
10,11,12,14,1
V
27,29,30,31
D6
D5
D4
D3
D2
D1
CC
5,18,19,22
EE
13,17,32
16,28
Pin
20
21
2
3
4
5
6
7
8
9
CC
Figure 1. Pinout: LQFP−32 (Top View)
and V
25
26
27
28
29
30
31
32
24
1
Q0,Q1,Q2,Q3,
Q4,Q5,Q6,Q8
EE
23
2
pins must be externally connected to Power Supply to guarantee proper operation.
Name
D[0:8]
CLK0
CLK0
CLK1
CLK1
S−IN
S−IN
SEL
V
V
MR
Q7
Q7
CC
EE
22
MC100EP142
3
MC10EP142
21
4
20
5
ECL Output
ECL Output
ECL Output
ECL Input
ECL Input
ECL Input
ECL Input
ECL Input
ECL Input
ECL Input
ECL Input
ECL Input
19
6
I/O
−
−
18
7
17
8
Default State
16
15
14
13
12
10
11
9
High
High
High
Low
Low
Low
Low
Low
Low
−
−
−
−
−
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V
Q4
Q3
V
Q2
Q1
Q0
MR
EE
CC
Single−Ended Parallel Data Inputs [0:8]. Internal 75 kW to V
Noninverted Differential Serial Input. Internal 75 kW to V
Inverted Differential Serial Input. Internal 75 kW to V
V
Noninverted Differential CLK0 Input. Internal 75 kW to V
Inverted Differential CLK0B Input. Internal 75 kW to V
to V
Noninverted Differential CLK1 Input. Internal 75 kW to V
Inverted Differential CLK1B Input. Internal 75 kW to V
to V
Single−Ended Select Logic Input. Internal 75 kW to V
Single−Ended Master Reset Logic Input. Internal 75 kW to V
Single−Ended parallel Data outputs [0,1,2,3,4,5,6,8]. Typically
Terminated with 50 W to V
Positive supply Voltage. All V
Power Supply to Guarantee Proper Operation.
Negative supply Voltage. All V
to Power Supply to Guarantee Proper Operation.
Noninverted Differential parallel/Serial Data Output 7. Typically
Terminated with 50 W to V
Inverted Differential parallel/Serial Data Output 7. Typically
Terminated with 50 W to V
2
CC
.
CC
CC
.
.
V
V
D6
D5
D4
D3
D2
D1
CC
EE
25
26
27
28
29
30
31
32
24
Figure 2. Pinout: QFN−32 (Top View)
1
23
2
TT
TT
TT
22
Description
3
= V
CC
= V
= V
Exposed Pad (EP)
EE
Pins must be Externally Connected to
CC
CC
CC
Pins must be Externally connected
21
4
− 2 V.
− 2 V.
− 2 V.
20
5
19
6
18
7
EE
EE
EE
EE
17
8
and 36.5 kW to
.
EE
EE
and 36.5 kW
and 36.5 kW
EE
.
.
16
15
14
13
12
11
10
.
9
EE
EE
.
.
V
Q4
Q3
V
Q2
Q1
Q0
MR
EE
CC