R5F52108ADFP#V0 Renesas Electronics Corporation., R5F52108ADFP#V0 Datasheet
R5F52108ADFP#V0
Manufacturer Part Number
R5F52108ADFP#V0
Description
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.R5F52108ADFMV0.pdf
(146 pages)
Specifications of R5F52108ADFP#V0
Pack_quantity
1
Comm_code
85423190
Lead_time
84
Eccn
3A991A2
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
RX210 Group
Renesas MCUs
50-MHz 32-bit RX MCUs, 78 DMIPS, up to 512-KB flash memory,
12-bit AD, 10-bit DA, ELC, MPC, RTC, up to 9 comms interfaces;
incorporating functions for IEC60730 compliance
R01DS0041EJ0090 Rev.0.90
Aug 10, 2011
Features
■ 32-bit RX CPU core
■ Low-power design and architecture
■ On-chip flash memory for code, no wait states
■ On-chip data flash memory
■ On-chip SRAM, no wait states
■ DMA
■ ELC
■ Reset and supply management
■ Clock functions
■ Real-time clock
Max. operating frequency: 50 MHz
Accumulator handles 64-bit results (for a single
Multiplication and division unit handles 32- × 32-bit
Fast interrupt
CISC Harvard architecture with 5-stage pipeline
Variable-length instructions, ultra-compact code
On-chip debugging circuit
Operation from a single 1.62- to 5.5-V supply
1.62-V operation available (at up to 20 MHz)
Deep software standby mode with RTC remaining usable
Four low-power modes
50-MHz operation, 20-ns read cycle
No wait states for reading at full CPU speed
128- to 512-Kbyte capacities
User code programmable via the SCI
Programmable at 1.62 V
For instructions and operands
Eight Kbytes
Erasing and programming impose no load on the CPU.
20- to 64-Kbyte size capacities
DMACA: Incorporates four channels
DTC: Four transfer modes
Module operation can be initiated by event signals
Modules can operate while the CPU is sleeping.
Nine types of reset, including the power-on reset (POR)
Low voltage detection (LVD) with voltage settings
Frequency of external clock: Up to 20 MHz
Frequency of the oscillator for sub-clock generation:
PLL circuit input: 4 to 12.5 MHz
On-chip low- and high-speed oscillators, dedicated on-
Generation of a dedicated 32.768-kHz clock for the RTC
Clock frequency accuracy measurement circuit (CAC)
Adjustment functions (30 seconds, leap year, and error)
Time capture function
Time capture on event-signal input through external pins
RTC capable of initiating return from deep software
Capable of 78 DMIPS in operation at 50 MHz
instruction) from 32- × 32-bit operations
operations (multiplication instructions take one CPU
clock cycle)
without going through interrupts.
32.768 kHz
chip low-speed oscillator for the IWDT
standby mode
Specifications in this document are tentative and subject to change.
■ Independent watchdog timer
■ Useful functions for IEC60730 compliance
■ Up to nine communications interfaces
■ External address space
■ Up to 14 extended-function timers
■ 12-bit A/D converter
■ 10-bit D/A converter
■ Analog comparator
■ Programmable I/O ports
■ MPC
■ Temperature sensor
■ Operating temp. range
125-kHz on-chip low-speed oscillator produces a
Self-diagnostic and disconnection-detection functions for
SCI with many useful functions (up to seven interfaces)
Asynchronous mode, clock synchronous mode, smart
I
RSPI (1)
Four CS areas (4 × 16 Mbytes)
8- or 16-bit bus space is selectable per area
16-bit MTU2: input capture, output capture,
8-bit TMR (4 channels)
16-bit compare-match timers (4 channels)
Capable of conversion within 1 μs
Sample-and-hold circuits (for three channels)
Three-channel synchronized sampling available
Self-diagnostic function and analog input disconnection
5-V tolerant, open drain, input pull-up, switching of
Multiple locations are selectable for I/O pins of
-40 C to +85C
dedicated clock signal to drive IWDT operation.
the AD converter, clock-frequency accuracy-
measurement circuit, independent watchdog timer,
functions to assist in RAM testing, etc.
card interface
SMBus operation (1 interface)
complementary PWM output, phase counting mode (6
channels)
detection assistance function
driving ability
peripheral functions
2
C bus interface: Transfer at up to 1 Mbps, capable of
Preliminary
PLQP0100KB-A 14 × 14 mm, 0.5-mm pitch
PLQP0080KB-A 12 × 12 mm, 0.5-mm pitch
PLQP0080JA-A 14 × 14 mm, 0.65-mm pitch
PLQP0064KB-A 10 × 10 mm, 0.5-mm pitch
PLQP0064GA-A 14 × 14 mm, 0.8-mm pitch
PTLG0100JA-A 7 × 7 mm, 0.65-mm pitch
Datasheet
R01DS0041EJ0090
Page 1 of 144
Aug 10, 2011
Rev.0.90