STM8AF6268TAX STMicroelectronics, STM8AF6268TAX Datasheet

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STM8AF6268TAX

Manufacturer Part Number
STM8AF6268TAX
Description
LQFP 48/STM8AF62 Standard Line
Manufacturer
STMicroelectronics
Datasheet

Specifications of STM8AF6268TAX

Pack_quantity
2400
Comm_code
85423190
Lead_time
175
Eccn
EAR99

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Part Number:
STM8AF6268TAX
Manufacturer:
ST
0
Features
February 2011
Automotive 8-bit MCU, with up to 32 Kbytes Flash, data EEPROM,
Core
– Max f
– Advanced STM8A core with Harvard
– Average 1.6 cycles/instruction resulting in
Memories
– Flash Program memory: 16 to 32 Kbytes
– Data memory: 0.5 to 1 Kbyte true data
– RAM: 1 to 2 Kbytes
Clock management
– Low-power crystal resonator oscillator with
– Internal, user-trimmable 16 MHz RC and
– Clock security system with clock monitor
Reset and supply management
– Wait/auto-wakeup/Halt low-power modes
– Low consumption power-on and power-
Interrupt management
– Nested interrupt controller with 32 vectors
– Up to 34 external interrupts on 5 vectors
Timers
– Up to 2 general purpose 16-bit PWM timers
– Advanced control timer: 16-bit, 4 CAPCOM
– 8-bit AR basic timer with 8-bit prescaler
– Auto-wakeup timer
architecture and 3-stage pipeline
10 MIPS at 16 MHz f
standard benchmark
Flash; data retention 20 years at 55 °C
after 1 kcycle
EEPROM; endurance 300 kcycles
external clock input
low-power 128 kHz RC oscillators
with user definable clock gating
down reset
with up to 3 CAPCOM channels each (IC,
OC or PWM)
channels, 3 complementary outputs, dead-
time insertion and flexible synchronization
CPU
: 16 MHz
CPU
for industry
STM8AF622x/4x STM8AF6266/68
STM8AF612x/4x STM8AF6166/68
10-bit ADC, timers, LIN, SPI, I
Doc ID 14952 Rev 5
Table 1.
1.
2.
STM8AF6268, STM8AF6248, STM8AF6266, STM8AF6246,
STM8AF6226
STM8AF6168, STM8AF6148, STM8AF6166, STM8AF6146,
STM8AF6126
– Window and independent watchdog timers
Communication interfaces
– LINUART
– LIN 2.1 compliant, master/slave modes
– SPI interface up to 10 Mbit/s or f
– I
Analog-to-digital converter (ADC)
– 10-bit accuracy, 2LSB TUE accuracy, 2LSB
– Analog watchdog, scan and continuous
I/Os
– Up to 38 user pins including 10 high sink
– Highly robust I/O design, immune against
Operating temperature up to 150 °C
Qualification conforms to
In the order code, the letter ‘F’ applies to devices featuring
Flash and data EEPROM, while ‘H’ refers to devices with
Flash memory only (see
Not recommended for new design.
Part numbers: STM8AF612x/4x STM8AF6166/68
with automatic resynchronization
TUE linearity ADC and up to 10 multiplexed
channels with individual data buffer
sampling mode
I/Os
current injection
Part numbers: STM8AF622x/4x STM8AF6266/68
2
C interface up to 400 Kbit/s
Device summary
LQFP48 7x7
VFQFPN32 5x5
Table
2,
Table
2
LQFP32 7x7
AEC-Q100 rev G
C, 3 to 5.5 V
(1)
3, and to
Figure
MASTER
www.st.com
(2)
45).
1/91
/2
1

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