LC78626 Sanyo Semicon Device, LC78626 Datasheet - Page 19

• Manufacturer Part Number: LC78626
• Description: DSP for Compact Disk Players
• Manufacturer: Sanyo Semicon Device

* The Tracking Brake
(4) The JP 3-state Output
(5) The Track Check Mode
The THLD Signal is generated on the LA9230M, 9240M Series side, and causes the tracking error signal to be held
during the JP pulse period.
The relationship between the TES, HFL, and TOFF signals during the track jump period c is as shown below. The
TOFF signal is generated from the HFL signal with the changing edge of the TES signal. The high of the HFL signal
is for the mirrored area, while the low is for the pitted area. As the beam sweeps from the mirrored surface to the
pitted area, TOFF becomes high, and as the beam sweeps from the pitted area to the mirrored surface, TOFF is made
low in the gain-enhanced state (TGL low), and the brake is applied.
Using the JP 3-state command, the track jump can be controlled with a single pin, however, the gain must be
increased on the servo side because the kick gain will decrease by 6 dB.
After the track check IN or track check OUT command has been entered, then when a discretionary number between
8 and 254 is entered as binary data, a track count of the specified number - 1 will be performed.
TES (when moving towards the outside)
TES (when moving towards the inside)
Code
Code
$B6
$B7
$F0
$F8
$FF
Command
Track check
TOFF output
2-state output
3-state output
HFL
The number of desired track checks = the number of track checks input – 1
JP 2-state output (conventional method)
In/Out command
Track check
Two byte command reset
Track check OUT
JP 3-state output
Track check IN
COMMAND
COMMAND
Binary input of the desired
number of tracks + 1
LC78626E
number of tracks/2
Rising edge at the
High impedance output
command reset
Double byte
Goes low when the track
RES = low
RES = low
check is complete.
Brake command
No. 5692-19/32